Lines Matching refs:SETLT
321 case ISD::SETLT: in softenSetCCOperands()
769 if (CC == ISD::SETLT && Op1.getValueType().isInteger() && in SimplifyMultipleUseDemandedBits()
1423 if (CC == ISD::SETLT && Op1.getValueType().isInteger() && in SimplifyDemandedBits()
3687 case ISD::SETLT: in SimplifySetCC()
3904 ISD::CondCode NewCC = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; in SimplifySetCC()
3916 if (Cond == ISD::SETLT || Cond == ISD::SETULT) { in SimplifySetCC()
3970 ISD::SETLT); in SimplifySetCC()
4260 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> ~Y & X in SimplifySetCC()
6190 Next = DAG.getSelectCC(dl, LH, Zero, NextSub, Next, ISD::SETLT); in expandMUL_LOHI()
6194 Next = DAG.getSelectCC(dl, RH, Zero, NextSub, Next, ISD::SETLT); in expandMUL_LOHI()
6438 DAG.getConstant(0, dl, DstVT), Ret, ISD::SETLT); in expandFP_TO_SINT()
6484 Sel = DAG.getSetCC(dl, SetCCVT, Src, Cst, ISD::SETLT, in expandFP_TO_UINT()
6488 Sel = DAG.getSetCC(dl, SetCCVT, Src, Cst, ISD::SETLT); in expandFP_TO_UINT()
6635 Node->getOpcode() == ISD::FMINNUM ? ISD::SETLT : ISD::SETGT; in expandFMINNUM_FMAXNUM()
7522 case ISD::SMIN: CC = ISD::SETLT; break; in expandIntMINMAX()
7616 SDValue SumNeg = DAG.getSetCC(dl, BoolVT, SumDiff, Zero, ISD::SETLT); in expandAddSubSat()
7648 SatMin, SatMax, ISD::SETLT); in expandShlSat()
7693 SDValue ProdNeg = DAG.getSetCC(dl, BoolVT, Product, Zero, ISD::SETLT); in expandFixedPointMul()
7776 ISD::SETLT); in expandFixedPointMul()
7793 Result = DAG.getSelectCC(dl, Hi, HighMask, SatMin, Result, ISD::SETLT); in expandFixedPointMul()
7869 SDValue LHSNeg = DAG.getSetCC(dl, BoolVT, LHS, Zero, ISD::SETLT); in expandFixedPointDiv()
7870 SDValue RHSNeg = DAG.getSetCC(dl, BoolVT, RHS, Zero, ISD::SETLT); in expandFixedPointDiv()
7944 SDValue ResultLowerThanLHS = DAG.getSetCC(dl, OType, Result, LHS, ISD::SETLT); in expandSADDSUBO()
7946 DAG.getSetCC(dl, OType, RHS, Zero, IsAdd ? ISD::SETLT : ISD::SETGT); in expandSADDSUBO()