• Home
  • Raw
  • Download

Lines Matching refs:ItinData

1092 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,  in getOperandLatency()  argument
1095 if (!ItinData || ItinData->isEmpty()) in getOperandLatency()
1103 return ItinData->getOperandCycle(DefClass, DefIdx); in getOperandLatency()
1105 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
1108 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() argument
1110 if (!ItinData || ItinData->isEmpty()) in getInstrLatency()
1116 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass()); in getInstrLatency()
1123 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() argument
1125 if (!ItinData || ItinData->isEmpty()) in getNumMicroOps()
1129 int UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps()
1154 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() argument
1159 if (!ItinData) in getInstrLatency()
1162 return ItinData->getStageLatency(MI.getDesc().getSchedClass()); in getInstrLatency()
1168 const InstrItineraryData *ItinData = SchedModel.getInstrItineraries(); in hasLowDefLatency() local
1169 if (!ItinData || ItinData->isEmpty()) in hasLowDefLatency()
1173 int DefCycle = ItinData->getOperandCycle(DefClass, DefIdx); in hasLowDefLatency()
1260 int TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() argument
1267 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
1273 const InstrItineraryData *ItinData, const MachineInstr &DefMI) const { in computeDefOperandLatency() argument
1276 if (!ItinData) in computeDefOperandLatency()
1277 return getInstrLatency(ItinData, DefMI); in computeDefOperandLatency()
1279 if(ItinData->isEmpty()) in computeDefOperandLatency()
1280 return defaultDefLatency(ItinData->SchedModel, DefMI); in computeDefOperandLatency()