Lines Matching refs:Addend
38 int64_t Addend = 0; in decodeAddend() local
83 Addend = *reinterpret_cast<support::ulittle32_t *>(LocalAddress); in decodeAddend()
85 Addend = *reinterpret_cast<support::ulittle64_t *>(LocalAddress); in decodeAddend()
97 Addend = (*p & 0x03FFFFFF) << 2; in decodeAddend()
98 Addend = SignExtend64(Addend, 28); in decodeAddend()
110 Addend = ((*p & 0x60000000) >> 29) | ((*p & 0x01FFFFE0) >> 3) << 12; in decodeAddend()
111 Addend = SignExtend64(Addend, 33); in decodeAddend()
132 Addend = (*p & 0x003FFC00) >> 10; in decodeAddend()
147 Addend <<= ImplicitShift; in decodeAddend()
151 return Addend; in decodeAddend()
156 MachO::RelocationInfoType RelType, int64_t Addend) const { in encodeAddend() argument
183 *reinterpret_cast<support::ulittle32_t *>(LocalAddress) = Addend; in encodeAddend()
185 *reinterpret_cast<support::ulittle64_t *>(LocalAddress) = Addend; in encodeAddend()
195 assert((Addend & 0x3) == 0 && "Branch target is not aligned"); in encodeAddend()
196 assert(isInt<28>(Addend) && "Branch target is out of range."); in encodeAddend()
199 *p = (*p & 0xFC000000) | ((uint32_t)(Addend >> 2) & 0x03FFFFFF); in encodeAddend()
209 assert((Addend & 0xFFF) == 0 && "ADRP target is not page aligned."); in encodeAddend()
210 assert(isInt<33>(Addend) && "Invalid page reloc value."); in encodeAddend()
213 uint32_t ImmLoValue = ((uint64_t)Addend << 17) & 0x60000000; in encodeAddend()
214 uint32_t ImmHiValue = ((uint64_t)Addend >> 9) & 0x00FFFFE0; in encodeAddend()
246 assert(((Addend & 0xF) == 0) && in encodeAddend()
251 assert(((Addend & 0x1) == 0) && "16-bit LDR/STR not 2-byte aligned."); in encodeAddend()
254 assert(((Addend & 0x3) == 0) && "32-bit LDR/STR not 4-byte aligned."); in encodeAddend()
257 assert(((Addend & 0x7) == 0) && "64-bit LDR/STR not 8-byte aligned."); in encodeAddend()
262 Addend >>= ImplicitShift; in encodeAddend()
263 assert(isUInt<12>(Addend) && "Addend cannot be encoded."); in encodeAddend()
266 *p = (*p & 0xFFC003FF) | ((uint32_t)(Addend << 10) & 0x003FFC00); in encodeAddend()
316 if (auto Addend = decodeAddend(RE)) in processRelocationRef() local
317 RE.Addend = *Addend; in processRelocationRef()
319 return Addend.takeError(); in processRelocationRef()
321 assert((ExplicitAddend == 0 || RE.Addend == 0) && "Relocation has "\ in processRelocationRef()
324 RE.Addend = ExplicitAddend; in processRelocationRef()
339 RE.Addend = Value.Offset; in processRelocationRef()
373 encodeAddend(LocalAddress, 1 << RE.Size, RelType, Value + RE.Addend); in resolveRelocation()
384 RE.IsPCRel ? (RE.Addend - RE.Offset) : (Value + RE.Addend); in resolveRelocation()
393 int64_t PCRelVal = Value - FinalAddress + RE.Addend; in resolveRelocation()
403 ((Value + RE.Addend) & (-4096)) - (FinalAddress & (-4096)); in resolveRelocation()
411 Value += RE.Addend; in resolveRelocation()
422 Value = SectionABase - SectionBBase + RE.Addend; in resolveRelocation()
499 int64_t Addend = in processSubtractRelocation() local
510 RelocationEntry R(SectionID, Offset, MachO::ARM64_RELOC_SUBTRACTOR, (uint64_t)Addend, in processSubtractRelocation()