Lines Matching refs:SimpleTy
329 switch (VT.SimpleTy) { in getImplicitScaleFactor()
1163 switch (RetVT.SimpleTy) { in emitAddSub()
1182 RetVT.SimpleTy = std::max(RetVT.SimpleTy, MVT::i32); in emitAddSub()
1490 switch (VT.SimpleTy) { in emitCmp()
1680 MVT VT = std::max(MVT::i32, RetVT.SimpleTy); in emitLogicalOp()
1702 switch (RetVT.SimpleTy) { in emitLogicalOp_ri()
1753 switch (RetVT.SimpleTy) { in emitLogicalOp_rs()
1860 switch (VT.SimpleTy) { in emitLoad()
2091 switch (VT.SimpleTy) { in emitStoreRelease()
2150 switch (VT.SimpleTy) { in emitStore()
2715 switch (VT.SimpleTy) { in selectSelect()
2984 MVT VT = ArgVT.getSimpleVT().SimpleTy; in fastLowerArguments()
3630 switch (VT.SimpleTy) { in fastLowerIntrinsicCall()
3975 switch (DestVT.SimpleTy) { in selectTrunc()
4042 switch (RetVT.SimpleTy) { in emitMul_rr()
4084 switch (RetVT.SimpleTy) { in emitLSL_rr()
4108 assert(RetVT.SimpleTy >= SrcVT.SimpleTy && in emitLSL_ri()
4172 if (SrcVT.SimpleTy <= MVT::i32 && RetVT == MVT::i64) { in emitLSL_ri()
4190 switch (RetVT.SimpleTy) { in emitLSR_rr()
4215 assert(RetVT.SimpleTy >= SrcVT.SimpleTy && in emitLSR_ri()
4293 if (SrcVT.SimpleTy <= MVT::i32 && RetVT == MVT::i64) { in emitLSR_ri()
4311 switch (RetVT.SimpleTy) { in emitASR_rr()
4336 assert(RetVT.SimpleTy >= SrcVT.SimpleTy && in emitASR_ri()
4402 if (SrcVT.SimpleTy <= MVT::i32 && RetVT == MVT::i64) { in emitASR_ri()
4432 switch (SrcVT.SimpleTy) { in emitIntExt()
4861 switch (RetVT.SimpleTy) { in selectBitCast()
4887 switch (RetVT.SimpleTy) { in selectFRem()