Lines Matching refs:SPLAT_VECTOR
1076 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom); in AArch64TargetLowering()
1107 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom); in AArch64TargetLowering()
1128 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom); in AArch64TargetLowering()
1154 setOperationAction(ISD::SPLAT_VECTOR, MVT::nxv8bf16, Custom); in AArch64TargetLowering()
1353 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom); in addTypeForFixedLengthSVE()
3866 if (Splat.getOpcode() != ISD::SPLAT_VECTOR) in getGatherScatterIndexIsExtended()
4216 case ISD::SPLAT_VECTOR: in LowerOperation()
6758 SDValue SplatPred = DAG.getNode(ISD::SPLAT_VECTOR, DL, PredVT, TruncCC); in LowerSELECT()
8878 SDValue SplatOne = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, One); in LowerDUPQLane()
8888 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()
12095 if (N->getOpcode() == AArch64ISD::DUP || N->getOpcode() == ISD::SPLAT_VECTOR) in isConstantSplatVectorMaskForType()
13063 Comparator.getOpcode() == ISD::SPLAT_VECTOR) { in tryConvertSVEWideCompare()
13111 SDValue Splat = DAG.getNode(ISD::SPLAT_VECTOR, DL, CmpVT, Imm); in tryConvertSVEWideCompare()
13302 return DAG.getNode(ISD::SPLAT_VECTOR, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
14827 SDValue SplatShift = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Shift); in getScaledOffsetForBitWidth()