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Lines Matching refs:TVal

2883     SDValue TVal = DAG.getConstant(1, dl, MVT::i32);  in LowerXOR()  local
2889 return DAG.getNode(AArch64ISD::CSEL, dl, Op.getValueType(), TVal, FVal, in LowerXOR()
2908 SDValue TVal = Sel.getOperand(2); in LowerXOR() local
2916 ConstantSDNode *CTVal = dyn_cast<ConstantSDNode>(TVal); in LowerXOR()
2925 std::swap(TVal, FVal); in LowerXOR()
2936 TVal = DAG.getNode(ISD::XOR, dl, Other.getValueType(), Other, in LowerXOR()
2939 return DAG.getNode(AArch64ISD::CSEL, dl, Sel.getValueType(), FVal, TVal, in LowerXOR()
2994 SDValue TVal = DAG.getConstant(1, dl, MVT::i32); in LowerXALUO() local
3001 Overflow = DAG.getNode(AArch64ISD::CSEL, dl, MVT::i32, FVal, TVal, in LowerXALUO()
6477 SDValue TVal = DAG.getConstant(1, dl, VT); in LowerSETCC() local
6502 SDValue Res = DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CCVal, Cmp); in LowerSETCC()
6529 Res = DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CC1Val, Cmp); in LowerSETCC()
6539 DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp); in LowerSETCC()
6542 Res = DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, CS1, CC2Val, Cmp); in LowerSETCC()
6548 SDValue RHS, SDValue TVal, in LowerSELECT_CC() argument
6580 ConstantSDNode *CTVal = dyn_cast<ConstantSDNode>(TVal); in LowerSELECT_CC()
6583 std::swap(TVal, FVal); in LowerSELECT_CC()
6587 std::swap(TVal, FVal); in LowerSELECT_CC()
6590 } else if (TVal.getOpcode() == ISD::XOR) { in LowerSELECT_CC()
6593 if (isAllOnesConstant(TVal.getOperand(1))) { in LowerSELECT_CC()
6594 std::swap(TVal, FVal); in LowerSELECT_CC()
6598 } else if (TVal.getOpcode() == ISD::SUB) { in LowerSELECT_CC()
6601 if (isNullConstant(TVal.getOperand(0))) { in LowerSELECT_CC()
6602 std::swap(TVal, FVal); in LowerSELECT_CC()
6619 } else if (TVal.getValueType() == MVT::i32) { in LowerSELECT_CC()
6646 std::swap(TVal, FVal); in LowerSELECT_CC()
6654 FVal = TVal; in LowerSELECT_CC()
6670 TVal = LHS; in LowerSELECT_CC()
6680 TVal = LHS; in LowerSELECT_CC()
6687 EVT VT = TVal.getValueType(); in LowerSELECT_CC()
6688 return DAG.getNode(Opcode, dl, VT, TVal, FVal, CCVal, Cmp); in LowerSELECT_CC()
6695 EVT VT = TVal.getValueType(); in LowerSELECT_CC()
6709 ConstantFPSDNode *CTVal = dyn_cast<ConstantFPSDNode>(TVal); in LowerSELECT_CC()
6712 CTVal && CTVal->isZero() && TVal.getValueType() == LHS.getValueType()) in LowerSELECT_CC()
6713 TVal = LHS; in LowerSELECT_CC()
6723 SDValue CS1 = DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp); in LowerSELECT_CC()
6729 return DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, CS1, CC2Val, Cmp); in LowerSELECT_CC()
6741 SDValue TVal = Op.getOperand(2); in LowerSELECT_CC() local
6744 return LowerSELECT_CC(CC, LHS, RHS, TVal, FVal, DL, DAG); in LowerSELECT_CC()
6750 SDValue TVal = Op->getOperand(1); in LowerSELECT() local
6759 return DAG.getNode(ISD::VSELECT, DL, Ty, SplatPred, TVal, FVal); in LowerSELECT()
6774 return DAG.getNode(AArch64ISD::CSEL, DL, Op.getValueType(), TVal, FVal, in LowerSELECT()
6790 return LowerSELECT_CC(CC, LHS, RHS, TVal, FVal, DL, DAG); in LowerSELECT()
13130 SDValue TVal = DAG.getConstant(1, DL, OutVT); in getPTest() local
13139 SDValue Res = DAG.getNode(AArch64ISD::CSEL, DL, OutVT, FVal, TVal, CC, Test); in getPTest()