Lines Matching refs:VECREDUCE_ADD

863   setTargetDAGCombine(ISD::VECREDUCE_ADD);  in AArch64TargetLowering()
1000       setOperationAction(ISD::VECREDUCE_ADD, VT, Custom);  in AArch64TargetLowering()
1006     setOperationAction(ISD::VECREDUCE_ADD, MVT::v2i64, Custom);  in AArch64TargetLowering()
1087       setOperationAction(ISD::VECREDUCE_ADD, VT, Custom);  in AArch64TargetLowering()
1362   setOperationAction(ISD::VECREDUCE_ADD, VT, Custom);  in addTypeForFixedLengthSVE()
4282   case ISD::VECREDUCE_ADD:  in LowerOperation()
10210                       (Op.getOpcode() != ISD::VECREDUCE_ADD &&  in LowerVECREDUCE()
10219     case ISD::VECREDUCE_ADD:  in LowerVECREDUCE()
10249   case ISD::VECREDUCE_ADD:  in LowerVECREDUCE()
11499   return DAG.getNode(ISD::VECREDUCE_ADD, DL, N->getValueType(0), Dot);  in performVecReduceAddCombine()
15318   case ISD::VECREDUCE_ADD:  in PerformDAGCombine()
15837   case ISD::VECREDUCE_ADD:  in ReplaceNodeResults()