3122   Register SrcReg0 = SrcReg;  in storeRegPairToStackSlot()  local
3125     SrcReg0 = TRI.getSubReg(SrcReg, SubIdx0);  in storeRegPairToStackSlot()
3131       .addReg(SrcReg0, getKillRegState(IsKill), SubIdx0)  in storeRegPairToStackSlot()
4555   Register SrcReg0 = MUL->getOperand(1).getReg();  in genFusedMultiply()  local
4573   if (Register::isVirtualRegister(SrcReg0))  in genFusedMultiply()
4574     MRI.constrainRegClass(SrcReg0, RC);  in genFusedMultiply()
4583               .addReg(SrcReg0, getKillRegState(Src0IsKill))  in genFusedMultiply()
4589               .addReg(SrcReg0, getKillRegState(Src0IsKill))  in genFusedMultiply()
4595               .addReg(SrcReg0, getKillRegState(Src0IsKill))  in genFusedMultiply()
4706   Register SrcReg0 = MUL->getOperand(1).getReg();  in genMaddR()  local
4713   if (Register::isVirtualRegister(SrcReg0))  in genMaddR()
4714     MRI.constrainRegClass(SrcReg0, RC);  in genMaddR()
4722           .addReg(SrcReg0, getKillRegState(Src0IsKill))  in genMaddR()