24                                 const MachineInstr &SecondMI) {  in isArithmeticBccPair()  argument
25   if (SecondMI.getOpcode() != AArch64::Bcc)  in isArithmeticBccPair()
65                                 const MachineInstr &SecondMI) {  in isArithmeticCbzPair()  argument
66   if (SecondMI.getOpcode() != AArch64::CBZW &&  in isArithmeticCbzPair()
67       SecondMI.getOpcode() != AArch64::CBZX &&  in isArithmeticCbzPair()
68       SecondMI.getOpcode() != AArch64::CBNZW &&  in isArithmeticCbzPair()
69       SecondMI.getOpcode() != AArch64::CBNZX)  in isArithmeticCbzPair()
115                       const MachineInstr &SecondMI) {  in isAESPair()  argument
117   switch (SecondMI.getOpcode()) {  in isAESPair()
133                             const MachineInstr &SecondMI) {  in isCryptoEORPair()  argument
134   if (SecondMI.getOpcode() != AArch64::EORv16i8)  in isCryptoEORPair()
156                            const MachineInstr &SecondMI) {  in isLiteralsPair()  argument
161       SecondMI.getOpcode() == AArch64::ADDXri)  in isLiteralsPair()
166       (SecondMI.getOpcode() == AArch64::MOVKWi &&  in isLiteralsPair()
167        SecondMI.getOperand(3).getImm() == 16))  in isLiteralsPair()
172      (SecondMI.getOpcode() == AArch64::MOVKXi &&  in isLiteralsPair()
173       SecondMI.getOperand(3).getImm() == 16))  in isLiteralsPair()
180       (SecondMI.getOpcode() == AArch64::MOVKXi &&  in isLiteralsPair()
181        SecondMI.getOperand(3).getImm() == 48))  in isLiteralsPair()
189                               const MachineInstr &SecondMI) {  in isAddressLdStPair()  argument
190   switch (SecondMI.getOpcode()) {  in isAddressLdStPair()
220       return SecondMI.getOperand(2).getImm() == 0;  in isAddressLdStPair()
231                            const MachineInstr &SecondMI) {  in isCCSelectPair()  argument
233   if (SecondMI.getOpcode() == AArch64::CSELWr) {  in isCCSelectPair()
251   if (SecondMI.getOpcode() == AArch64::CSELXr) {  in isCCSelectPair()
274                                   const MachineInstr &SecondMI) {  in isArithmeticLogicPair()  argument
275   if (AArch64InstrInfo::hasShiftedReg(SecondMI))  in isArithmeticLogicPair()
278   switch (SecondMI.getOpcode()) {  in isArithmeticLogicPair()
378                                    const MachineInstr &SecondMI) {  in shouldScheduleAdjacent()  argument
383   if (ST.hasArithmeticBccFusion() && isArithmeticBccPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
385   if (ST.hasArithmeticCbzFusion() && isArithmeticCbzPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
387   if (ST.hasFuseAES() && isAESPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
389   if (ST.hasFuseCryptoEOR() && isCryptoEORPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
391   if (ST.hasFuseLiterals() && isLiteralsPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
393   if (ST.hasFuseAddress() && isAddressLdStPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
395   if (ST.hasFuseCCSelect() && isCCSelectPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
397   if (ST.hasFuseArithmeticLogic() && isArithmeticLogicPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()