287   const ArgInfo &OrigArg,  in splitToValueTypes()  argument
293   LLVMContext &Ctx = OrigArg.Ty->getContext();  in splitToValueTypes()
295   if (OrigArg.Ty->isVoidTy())  in splitToValueTypes()
299   ComputeValueVTs(TLI, DL, OrigArg.Ty, SplitVTs);  in splitToValueTypes()
301   assert(OrigArg.Regs.size() == SplitVTs.size());  in splitToValueTypes()
305     Register Reg = OrigArg.Regs[SplitIdx];  in splitToValueTypes()
311       if (OrigArg.Flags[0].isSExt()) {  in splitToValueTypes()
312         assert(OrigArg.Regs.size() == 1 && "expect only simple return values");  in splitToValueTypes()
314       } else if (OrigArg.Flags[0].isZExt()) {  in splitToValueTypes()
315         assert(OrigArg.Regs.size() == 1 && "expect only simple return values");  in splitToValueTypes()
335       SplitArgs.emplace_back(Reg, Ty, OrigArg.Flags, OrigArg.IsFixed);  in splitToValueTypes()
351       SplitArgs.emplace_back(ArrayRef<Register>(PartReg), PartTy, OrigArg.Flags);  in splitToValueTypes()
858     ArgInfo OrigArg(VRegs[Idx], Arg.getType());  in lowerFormalArguments()  local
860     setArgFlags(OrigArg, OrigArgIdx, DL, F);  in lowerFormalArguments()
863       B, OrigArg, SplitArgs, DL, CC, false,  in lowerFormalArguments()
1164   for (auto &OrigArg : Info.OrigArgs) {  in lowerCall()  local
1166       MIRBuilder, OrigArg, OutArgs, DL, Info.CallConv, true,  in lowerCall()
1171         unpackRegsToOrigType(MIRBuilder, Regs, SrcReg, OrigArg, LLTy, PartLLT);  in lowerCall()