Lines Matching refs:EXTRACT_SUBVECTOR
338 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2f32, Custom); in AMDGPUTargetLowering()
339 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2i32, Custom); in AMDGPUTargetLowering()
340 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v3f32, Custom); in AMDGPUTargetLowering()
341 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v3i32, Custom); in AMDGPUTargetLowering()
342 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v4f32, Custom); in AMDGPUTargetLowering()
343 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v4i32, Custom); in AMDGPUTargetLowering()
344 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v5f32, Custom); in AMDGPUTargetLowering()
345 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v5i32, Custom); in AMDGPUTargetLowering()
346 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v8f32, Custom); in AMDGPUTargetLowering()
347 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v8i32, Custom); in AMDGPUTargetLowering()
348 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v16f32, Custom); in AMDGPUTargetLowering()
349 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v16i32, Custom); in AMDGPUTargetLowering()
350 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v32f32, Custom); in AMDGPUTargetLowering()
351 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v32i32, Custom); in AMDGPUTargetLowering()
352 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2f64, Custom); in AMDGPUTargetLowering()
353 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2i64, Custom); in AMDGPUTargetLowering()
354 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v4f64, Custom); in AMDGPUTargetLowering()
355 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v4i64, Custom); in AMDGPUTargetLowering()
356 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v8f64, Custom); in AMDGPUTargetLowering()
357 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v8i64, Custom); in AMDGPUTargetLowering()
358 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v16f64, Custom); in AMDGPUTargetLowering()
359 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v16i64, Custom); in AMDGPUTargetLowering()
1238 case ISD::EXTRACT_SUBVECTOR: return LowerEXTRACT_SUBVECTOR(Op, DAG); in LowerOperation()
1505 SDValue Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N, in splitVector()
1508 HiVT.isVector() ? ISD::EXTRACT_SUBVECTOR : ISD::EXTRACT_VECTOR_ELT, DL, in splitVector()
1601 {DAG.getNode(ISD::EXTRACT_SUBVECTOR, SL, VT, WideLoad, in WidenOrSplitVectorLoad()