213 static bool isVectorRegisterBank(const RegisterBank &Bank) {  in isVectorRegisterBank()
669   const RegisterBank *Bank = getRegBank(Reg, *MRI, *TRI);  in split64BitValueForMapping()  local
1099   const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI);  in constrainOpWithReadfirstlane()  local
3176     if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) {  in getMappingType()  local
3193     if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) {  in isSALUMapping()  local
3372   const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI);  in getRegBankID()  local
3382   unsigned Bank = getRegBankID(Reg, MRI, AMDGPU::SGPRRegBankID);  in getSGPROpMapping()  local
3480       const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI);  in getInstrMapping()  local
3715     unsigned Bank = getMappingType(MRI, MI);  in getInstrMapping()  local
3752     unsigned Bank = getRegBankID(Src, MRI);  in getInstrMapping()  local
3882     unsigned Bank = getMappingType(MRI, MI);  in getInstrMapping()  local
4301       unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI,  in getInstrMapping()  local
4308       unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI,  in getInstrMapping()  local
4377       unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI,  in getInstrMapping()  local
4386       unsigned Bank = getRegBankID(MI.getOperand(1).getReg(), MRI,  in getInstrMapping()  local
4414     unsigned Bank = SGPRSrcs && CondBank == AMDGPU::SGPRRegBankID ?  in getInstrMapping()  local
4469     unsigned Bank = getRegBankID(MI.getOperand(0).getReg(), MRI,  in getInstrMapping()  local