173   const TargetRegisterClass *SrcRC = SrcReg.isVirtual()  in getCopyRegClasses()  local
184   return std::make_pair(SrcRC, DstRC);  in getCopyRegClasses()
187 static bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC,  in isVGPRToSGPRCopy()  argument
190   return SrcRC != &AMDGPU::VReg_1RegClass && TRI.isSGPRClass(DstRC) &&  in isVGPRToSGPRCopy()
191          TRI.hasVectorRegisters(SrcRC);  in isVGPRToSGPRCopy()
194 static bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC,  in isSGPRToVGPRCopy()  argument
197   return DstRC != &AMDGPU::VReg_1RegClass && TRI.isSGPRClass(SrcRC) &&  in isSGPRToVGPRCopy()
259   const TargetRegisterClass *SrcRC, *DstRC;  in foldVGPRCopyIntoRegSequence()  local
260   std::tie(SrcRC, DstRC) = getCopyRegClasses(CopyUse, *TRI, MRI);  in foldVGPRCopyIntoRegSequence()
262   if (!isSGPRToVGPRCopy(SrcRC, DstRC, *TRI))  in foldVGPRCopyIntoRegSequence()
290     const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg);  in foldVGPRCopyIntoRegSequence()  local
291     assert(TRI->isSGPRClass(SrcRC) &&  in foldVGPRCopyIntoRegSequence()
294     SrcRC = TRI->getSubRegClass(SrcRC, SrcSubReg);  in foldVGPRCopyIntoRegSequence()
295     const TargetRegisterClass *NewSrcRC = TRI->getEquivalentVGPRClass(SrcRC);  in foldVGPRCopyIntoRegSequence()
304       const TargetRegisterClass *NewSrcRC = TRI->getEquivalentAGPRClass(SrcRC);  in foldVGPRCopyIntoRegSequence()
611         const TargetRegisterClass *SrcRC, *DstRC;  in runOnMachineFunction()  local
612         std::tie(SrcRC, DstRC) = getCopyRegClasses(MI, *TRI, *MRI);  in runOnMachineFunction()
619           if (DstReg == AMDGPU::M0 && TRI->hasVectorRegisters(SrcRC)) {  in runOnMachineFunction()
632         if (isVGPRToSGPRCopy(SrcRC, DstRC, *TRI)) {  in runOnMachineFunction()
667         } else if (isSGPRToVGPRCopy(SrcRC, DstRC, *TRI)) {  in runOnMachineFunction()