Lines Matching refs:BuildMI
153 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::SCRATCH_STORE_DWORD_SADDR)) in buildPrologSpill()
164 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::BUFFER_STORE_DWORD_OFFSET)) in buildPrologSpill()
186 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_ADD_U32), OffsetReg) in buildPrologSpill()
190 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::SCRATCH_STORE_DWORD_SADDR)) in buildPrologSpill()
202 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::V_MOV_B32_e32), OffsetReg) in buildPrologSpill()
205 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::BUFFER_STORE_DWORD_OFFEN)) in buildPrologSpill()
237 BuildMI(MBB, I, DebugLoc(), in buildEpilogReload()
250 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_ADD_U32), OffsetReg) in buildEpilogReload()
253 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::SCRATCH_LOAD_DWORD_SADDR), in buildEpilogReload()
265 BuildMI(MBB, I, DebugLoc(), in buildEpilogReload()
282 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::V_MOV_B32_e32), OffsetReg) in buildEpilogReload()
285 BuildMI(MBB, I, DebugLoc(), in buildEpilogReload()
310 BuildMI(MBB, I, DL, SMovB32, TargetHi) in buildGitPtr()
315 BuildMI(MBB, I, DL, GetPC64, TargetReg); in buildGitPtr()
320 BuildMI(MBB, I, DL, SMovB32, TargetLo) in buildGitPtr()
387 BuildMI(MBB, I, DL, LoadDwordX2, FlatScrInit) in emitEntryFunctionFlatScratchInit()
396 BuildMI(MBB, I, DL, SAndB32, FlatScrInitHi) in emitEntryFunctionFlatScratchInit()
415 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADD_U32), FlatScrInitLo) in emitEntryFunctionFlatScratchInit()
418 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADDC_U32), FlatScrInitHi) in emitEntryFunctionFlatScratchInit()
421 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_SETREG_B32)). in emitEntryFunctionFlatScratchInit()
425 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_SETREG_B32)). in emitEntryFunctionFlatScratchInit()
433 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADD_U32), AMDGPU::FLAT_SCR_LO) in emitEntryFunctionFlatScratchInit()
436 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADDC_U32), AMDGPU::FLAT_SCR_HI) in emitEntryFunctionFlatScratchInit()
446 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), AMDGPU::FLAT_SCR_LO) in emitEntryFunctionFlatScratchInit()
451 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADD_U32), FlatScrInitLo) in emitEntryFunctionFlatScratchInit()
456 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_LSHR_B32), AMDGPU::FLAT_SCR_HI) in emitEntryFunctionFlatScratchInit()
614 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), ScratchWaveOffsetReg) in emitEntryFunctionPrologue()
627 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), SPReg) in emitEntryFunctionPrologue()
634 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), FPReg).addImm(0); in emitEntryFunctionPrologue()
684 BuildMI(MBB, I, DL, LoadDwordX4, ScratchRsrcReg) in emitEntryFunctionScratchRsrcRegSetup()
707 BuildMI(MBB, I, DL, Mov64, Rsrc01) in emitEntryFunctionScratchRsrcRegSetup()
719 BuildMI(MBB, I, DL, LoadDwordX2, Rsrc01) in emitEntryFunctionScratchRsrcRegSetup()
734 BuildMI(MBB, I, DL, SMovB32, Rsrc0) in emitEntryFunctionScratchRsrcRegSetup()
738 BuildMI(MBB, I, DL, SMovB32, Rsrc1) in emitEntryFunctionScratchRsrcRegSetup()
744 BuildMI(MBB, I, DL, SMovB32, Rsrc2) in emitEntryFunctionScratchRsrcRegSetup()
748 BuildMI(MBB, I, DL, SMovB32, Rsrc3) in emitEntryFunctionScratchRsrcRegSetup()
755 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), ScratchRsrcReg) in emitEntryFunctionScratchRsrcRegSetup()
774 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADD_U32), ScratchRsrcSub0) in emitEntryFunctionScratchRsrcRegSetup()
778 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADDC_U32), ScratchRsrcSub1) in emitEntryFunctionScratchRsrcRegSetup()
835 BuildMI(MBB, MBBI, DL, TII->get(OrSaveExec), ScratchExecCopy).addImm(-1); in buildScratchExecCopy()
891 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FuncInfo->SGPRForFPSaveRestoreCopy) in emitPrologue()
898 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), in emitPrologue()
945 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_MOV_B32_e32), TmpVGPR) in emitPrologue()
962 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_MOV_B32_e32), TmpVGPR) in emitPrologue()
974 BuildMI(MBB, MBBI, DL, TII->get(ExecMov), Exec) in emitPrologue()
991 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_WRITELANE_B32), Spill[0].VGPR) in emitPrologue()
1009 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_WRITELANE_B32), Spill[0].VGPR) in emitPrologue()
1034 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_U32), ScratchSPReg) in emitPrologue()
1038 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_AND_B32), FramePtrReg) in emitPrologue()
1044 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FramePtrReg) in emitPrologue()
1054 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg) in emitPrologue()
1060 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_U32), StackPtrReg) in emitPrologue()
1122 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_SUB_U32), StackPtrReg) in emitEpilogue()
1129 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FramePtrReg) in emitEpilogue()
1135 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg) in emitEpilogue()
1152 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), FramePtrReg) in emitEpilogue()
1160 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_READLANE_B32), FramePtrReg) in emitEpilogue()
1177 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), BasePtrReg) in emitEpilogue()
1185 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_READLANE_B32), BasePtrReg) in emitEpilogue()
1208 BuildMI(MBB, MBBI, DL, TII->get(ExecMov), Exec) in emitEpilogue()
1397 BuildMI(MBB, I, DL, TII->get(Op), SPReg) in eliminateCallFramePseudoInstr()