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Lines Matching refs:ResultReg

5781     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveScalarAddSub()  local
5795 MRI.replaceRegWith(OldDstReg, ResultReg); in moveScalarAddSub()
5798 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in moveScalarAddSub()
5862 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerSelect() local
5865 BuildMI(MBB, MII, DL, get(AMDGPU::V_CNDMASK_B32_e64), ResultReg) in lowerSelect()
5872 MRI.replaceRegWith(Dest.getReg(), ResultReg); in lowerSelect()
5874 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in lowerSelect()
5887 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarAbs() local
5896 BuildMI(MBB, MII, DL, get(AMDGPU::V_MAX_I32_e64), ResultReg) in lowerScalarAbs()
5900 MRI.replaceRegWith(Dest.getReg(), ResultReg); in lowerScalarAbs()
5901 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in lowerScalarAbs()
6276 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBCNT() local
6287 BuildMI(MBB, MII, DL, InstDesc, ResultReg).add(SrcRegSub1).addReg(MidReg); in splitScalar64BitBCNT()
6289 MRI.replaceRegWith(Dest.getReg(), ResultReg); in splitScalar64BitBCNT()
6293 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in splitScalar64BitBCNT()
6317 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local
6328 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), ResultReg) in splitScalar64BitBFE()
6334 MRI.replaceRegWith(Dest.getReg(), ResultReg); in splitScalar64BitBFE()
6335 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in splitScalar64BitBFE()
6341 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local
6347 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), ResultReg) in splitScalar64BitBFE()
6353 MRI.replaceRegWith(Dest.getReg(), ResultReg); in splitScalar64BitBFE()
6354 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in splitScalar64BitBFE()
6396 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
6416 BuildMI(*MBB, Inst, DL, get(AMDGPU::V_LSHL_OR_B32), ResultReg) in movePackToVALU()
6426 BuildMI(*MBB, Inst, DL, get(AMDGPU::V_BFI_B32), ResultReg) in movePackToVALU()
6440 BuildMI(*MBB, Inst, DL, get(AMDGPU::V_AND_OR_B32), ResultReg) in movePackToVALU()
6451 MRI.replaceRegWith(Dest.getReg(), ResultReg); in movePackToVALU()
6452 addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist); in movePackToVALU()