Lines Matching refs:sdst
71 bits<7> sdst;
76 let Inst{22-16} = !if(ps.has_sdst, sdst, ?);
81 opName, (outs SReg_32:$sdst),
84 "$sdst, $src0", pattern> {
85 let Constraints = !if(tied_in, "$sdst = $sdst_in", "");
90 opName, (outs SReg_32:$sdst), (ins SReg_32:$src0),
91 "$sdst, $src0", pattern>;
100 // Special case for movreld where sdst is treated as a use operand.
102 opName, (outs), (ins SReg_32:$sdst, SSrc_b32:$src0),
103 "$sdst, $src0", pattern>;
105 // Special case for movreld where sdst is treated as a use operand.
107 opName, (outs), (ins SReg_64:$sdst, SSrc_b64:$src0),
108 "$sdst, $src0", pattern
118 opName, (outs SReg_64:$sdst), (ins SSrc_b64:$src0),
119 "$sdst, $src0", pattern
124 opName, (outs SReg_64:$sdst), (ins SReg_64:$src0),
125 "$sdst, $src0", pattern
130 opName, (outs SReg_32:$sdst), (ins SSrc_b64:$src0),
131 "$sdst, $src0", pattern
136 opName, (outs SReg_64:$sdst),
139 "$sdst, $src0", pattern> {
140 let Constraints = !if(tied_in, "$sdst = $sdst_in", "");
145 opName, (outs SReg_64:$sdst), (ins), "$sdst", pattern> {
170 [(set i32:$sdst, (not i32:$src0))]
174 [(set i64:$sdst, (not i64:$src0))]
196 [(set i32:$sdst, (bitreverse i32:$src0))]
204 [(set i32:$sdst, (ctpop i32:$src0))]
207 [(set i32:$sdst, (ctpop i64:$src0))]
214 [(set i32:$sdst, (AMDGPUffbl_b32 i64:$src0))]
218 [(set i32:$sdst, (AMDGPUffbl_b32 i32:$src0))]
222 [(set i32:$sdst, (AMDGPUffbh_u32 i32:$src0))]
226 [(set i32:$sdst, (AMDGPUffbh_u32 i64:$src0))]
229 [(set i32:$sdst, (AMDGPUffbh_i32 i32:$src0))]
233 [(set i32:$sdst, (sext_inreg i32:$src0, i8))]
236 [(set i32:$sdst, (sext_inreg i32:$src0, i16))]
244 [(set i64:$sdst, (int_amdgcn_s_getpc))]
356 // let sdst = xxx in {
358 // field bits<7> sdst = 0;
376 bits<7> sdst;
382 let Inst{22-16} = !if(ps.has_sdst, sdst, ?);
389 opName, (outs SReg_32:$sdst), (ins SSrc_b32:$src0, SSrc_b32:$src1),
390 "$sdst, $src0, $src1", pattern
394 opName, (outs SReg_64:$sdst), (ins SSrc_b64:$src0, SSrc_b64:$src1),
395 "$sdst, $src0, $src1", pattern
399 opName, (outs SReg_64:$sdst), (ins SSrc_b64:$src0, SSrc_b32:$src1),
400 "$sdst, $src0, $src1", pattern
404 opName, (outs SReg_64:$sdst), (ins SSrc_b32:$src0, SSrc_b32:$src1),
405 "$sdst, $src0, $src1", pattern
448 [(set i32:$sdst, (UniformBinFrag<add> SSrc_b32:$src0, SSrc_b32:$src1))]
454 [(set i32:$sdst, (UniformBinFrag<sub> SSrc_b32:$src0, SSrc_b32:$src1))]
460 [(set i32:$sdst, (UniformBinFrag<adde> (i32 SSrc_b32:$src0), (i32 SSrc_b32:$src1)))]>;
464 [(set i32:$sdst, (UniformBinFrag<sube> (i32 SSrc_b32:$src0), (i32 SSrc_b32:$src1)))]>;
470 [(set i32:$sdst, (smin i32:$src0, i32:$src1))]
473 [(set i32:$sdst, (umin i32:$src0, i32:$src1))]
476 [(set i32:$sdst, (smax i32:$src0, i32:$src1))]
479 [(set i32:$sdst, (umax i32:$src0, i32:$src1))]
498 [(set i32:$sdst, (SelectPat<select> i32:$src0, i32:$src1))]
508 [(set i32:$sdst, (UniformBinFrag<and> i32:$src0, i32:$src1))]
512 [(set i64:$sdst, (UniformBinFrag<and> i64:$src0, i64:$src1))]
516 [(set i32:$sdst, (UniformBinFrag<or> i32:$src0, i32:$src1))]
520 [(set i64:$sdst, (UniformBinFrag<or> i64:$src0, i64:$src1))]
524 [(set i32:$sdst, (UniformBinFrag<xor> i32:$src0, i32:$src1))]
528 [(set i64:$sdst, (UniformBinFrag<xor> i64:$src0, i64:$src1))]
532 [(set i32:$sdst, (not (xor_oneuse i32:$src0, i32:$src1)))]
536 [(set i64:$sdst, (not (xor_oneuse i64:$src0, i64:$src1)))]
540 [(set i32:$sdst, (not (and_oneuse i32:$src0, i32:$src1)))]
544 [(set i64:$sdst, (not (and_oneuse i64:$src0, i64:$src1)))]
548 [(set i32:$sdst, (not (or_oneuse i32:$src0, i32:$src1)))]
552 [(set i64:$sdst, (not (or_oneuse i64:$src0, i64:$src1)))]
558 [(set i32:$sdst, (UniformBinFrag<and> i32:$src0, (UniformUnaryFrag<not> i32:$src1)))]
562 [(set i64:$sdst, (UniformBinFrag<and> i64:$src0, (UniformUnaryFrag<not> i64:$src1)))]
566 [(set i32:$sdst, (UniformBinFrag<or> i32:$src0, (UniformUnaryFrag<not> i32:$src1)))]
570 [(set i64:$sdst, (UniformBinFrag<or> i64:$src0, (UniformUnaryFrag<not> i64:$src1)))]
580 [(set SReg_32:$sdst, (UniformBinFrag<shl> (i32 SSrc_b32:$src0), (i32 SSrc_b32:$src1)))]
583 [(set SReg_64:$sdst, (UniformBinFrag<shl> (i64 SSrc_b64:$src0), (i32 SSrc_b32:$src1)))]
586 [(set SReg_32:$sdst, (UniformBinFrag<srl> (i32 SSrc_b32:$src0), (i32 SSrc_b32:$src1)))]
589 [(set SReg_64:$sdst, (UniformBinFrag<srl> (i64 SSrc_b64:$src0), (i32 SSrc_b32:$src1)))]
592 [(set SReg_32:$sdst, (UniformBinFrag<sra> (i32 SSrc_b32:$src0), (i32 SSrc_b32:$src1)))]
595 [(set SReg_64:$sdst, (UniformBinFrag<sra> (i64 SSrc_b64:$src0), (i32 SSrc_b32:$src1)))]
600 [(set i32:$sdst, (UniformBinFrag<AMDGPUbfm> i32:$src0, i32:$src1))]>;
605 [(set i32:$sdst, (mul i32:$src0, i32:$src1))]> {
649 [(set i32:$sdst, (shl1_add SSrc_b32:$src0, SSrc_b32:$src1))]
652 [(set i32:$sdst, (shl2_add SSrc_b32:$src0, SSrc_b32:$src1))]
655 [(set i32:$sdst, (shl3_add SSrc_b32:$src0, SSrc_b32:$src1))]
658 [(set i32:$sdst, (shl4_add SSrc_b32:$src0, SSrc_b32:$src1))]
664 [(set i32:$sdst, (UniformBinFrag<mulhu> SSrc_b32:$src0, SSrc_b32:$src1))]>;
666 [(set i32:$sdst, (UniformBinFrag<mulhs> SSrc_b32:$src0, SSrc_b32:$src1))]>;
706 bits<7> sdst;
715 let Inst{22-16} = !if(ps.has_sdst, sdst, ?);
724 let Inst{22-16} = !if(ps.has_sdst, sdst, ?);
737 (outs SReg_32:$sdst),
739 "$sdst, $simm16",
745 (ins sopp_brtarget:$simm16, SReg_32:$sdst),
746 "$sdst, $simm16",
759 (ins SReg_32:$sdst, s16imm:$simm16),
760 (ins SReg_32:$sdst, u16imm:$simm16)),
761 "$sdst, $simm16", []>,
768 (outs SReg_32:$sdst),
770 "$sdst, $simm16",
816 Constraints = "$sdst = $src0" in {
824 (outs), (ins SReg_64:$sdst, sopp_brtarget:$simm16),
825 "$sdst, $simm16"
834 (outs SReg_32:$sdst), (ins hwreg:$simm16),
835 "$sdst, $simm16",
836 [(set i32:$sdst, (int_amdgcn_s_getreg (i32 timm:$simm16)))]> {
847 (outs), (ins SReg_32:$sdst, hwreg:$simm16),
848 "$simm16, $sdst",
852 [(int_amdgcn_s_setreg (i32 timm:$simm16), i32:$sdst)]> {
892 (ins SReg_32:$sdst, s16imm:$simm16),
893 "$sdst, $simm16",
898 let has_sdst = 1; // First source takes place of sdst in encoding
904 (outs SReg_64:$sdst),
906 "$sdst, $simm16"> {