Lines Matching refs:VFP

36 // FP loads/stores/moves, shared between VFP and MVE (even in the integer-only
41 // 16-bit FP loads/stores/moves, shared between VFP (with the v8.2A FP16
204 // Cyclone can zero VFP registers in 0 cycles.
251                                                "Use a wide stride when allocating VFP registers">;
259 // VFP register widths.
262                                              "Splat register from VFP to NEON",
265 // Whether or not it is profitable to expand VFP/NEON MLA/MLS instructions.
268                                              "Expand VFP/NEON MLA/MLS instructions">;
270 // Some targets have special RAW hazards for VFP/NEON VMLA/VMLS.
275 // VFP to NEON, as an execution domain optimization.
295 // Some processors have a nonpipelined VFP coprocessor.
298                                               "VFP instructions are not pipelined">;
301 // play nicely with other VFP / NEON instructions, and it's generally better
304                                              "Disable VFP / NEON MAC instructions">;
308                                              "Disable VFP / NEON FMA instructions">;