Lines Matching refs:MF
67 ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { in getCalleeSavedRegs()
68 const ARMSubtarget &STI = MF->getSubtarget<ARMSubtarget>(); in getCalleeSavedRegs()
69 bool UseSplitPush = STI.splitFramePushPop(*MF); in getCalleeSavedRegs()
75 const Function &F = MF->getFunction(); in getCalleeSavedRegs()
108 return MF->getInfo<ARMFunctionInfo>()->isSplitCSR() in getCalleeSavedRegs()
115 const MachineFunction *MF) const { in getCalleeSavedRegsViaCopy()
116 assert(MF && "Invalid MachineFunction pointer."); in getCalleeSavedRegsViaCopy()
117 if (MF->getFunction().getCallingConv() == CallingConv::CXX_FAST_TLS && in getCalleeSavedRegsViaCopy()
118 MF->getInfo<ARMFunctionInfo>()->isSplitCSR()) in getCalleeSavedRegsViaCopy()
124 ARMBaseRegisterInfo::getCallPreservedMask(const MachineFunction &MF, in getCallPreservedMask() argument
126 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getCallPreservedMask()
133 MF.getFunction().getAttributes().hasAttrSomewhere(Attribute::SwiftError)) in getCallPreservedMask()
148 ARMBaseRegisterInfo::getTLSCallPreservedMask(const MachineFunction &MF) const { in getTLSCallPreservedMask()
149 assert(MF.getSubtarget<ARMSubtarget>().isTargetDarwin() && in getTLSCallPreservedMask()
155 ARMBaseRegisterInfo::getSjLjDispatchPreservedMask(const MachineFunction &MF) const { in getSjLjDispatchPreservedMask()
156 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getSjLjDispatchPreservedMask()
164 ARMBaseRegisterInfo::getThisReturnPreservedMask(const MachineFunction &MF, in getThisReturnPreservedMask() argument
166 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getThisReturnPreservedMask()
183 const MachineFunction *MF) const { in getIntraCallClobberedRegs()
189 getReservedRegs(const MachineFunction &MF) const { in getReservedRegs()
190 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getReservedRegs()
191 const ARMFrameLowering *TFI = getFrameLowering(MF); in getReservedRegs()
199 if (TFI->hasFP(MF)) in getReservedRegs()
201 if (hasBasePointer(MF)) in getReservedRegs()
225 isAsmClobberable(const MachineFunction &MF, MCRegister PhysReg) const { in isAsmClobberable() argument
226 return !getReservedRegs(MF).test(PhysReg); in isAsmClobberable()
229 bool ARMBaseRegisterInfo::isInlineAsmReadOnlyReg(const MachineFunction &MF, in isInlineAsmReadOnlyReg() argument
231 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in isInlineAsmReadOnlyReg()
232 const ARMFrameLowering *TFI = getFrameLowering(MF); in isInlineAsmReadOnlyReg()
236 if (TFI->hasFP(MF)) in isInlineAsmReadOnlyReg()
238 if (hasBasePointer(MF)) in isInlineAsmReadOnlyReg()
246 const MachineFunction &MF) const { in getLargestLegalSuperClass()
259 if (MF.getSubtarget<ARMSubtarget>().hasNEON()) in getLargestLegalSuperClass()
268 ARMBaseRegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind) in getPointerRegClass() argument
282 MachineFunction &MF) const { in getRegPressureLimit()
283 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getRegPressureLimit()
284 const ARMFrameLowering *TFI = getFrameLowering(MF); in getRegPressureLimit()
293 bool HasFP = MF.getFrameInfo().isMaxCallFrameSizeComputed() in getRegPressureLimit()
294 ? TFI->hasFP(MF) : true; in getRegPressureLimit()
298 bool HasFP = MF.getFrameInfo().isMaxCallFrameSizeComputed() in getRegPressureLimit()
299 ? TFI->hasFP(MF) : true; in getRegPressureLimit()
320 SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, in getRegAllocationHints() argument
322 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getRegAllocationHints()
334 TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
339 return TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
374 MachineFunction &MF) const { in updateRegAllocHint()
375 MachineRegisterInfo *MRI = &MF.getRegInfo(); in updateRegAllocHint()
398 bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer()
399 const MachineFrameInfo &MFI = MF.getFrameInfo(); in hasBasePointer()
400 const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in hasBasePointer()
401 const ARMFrameLowering *TFI = getFrameLowering(MF); in hasBasePointer()
406 if (needsStackRealignment(MF) && !TFI->hasReservedCallFrame(MF)) in hasBasePointer()
430 if (AFI->isThumb1OnlyFunction() && !TFI->hasReservedCallFrame(MF)) in hasBasePointer()
435 bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const { in canRealignStack()
436 const MachineRegisterInfo *MRI = &MF.getRegInfo(); in canRealignStack()
437 const ARMFrameLowering *TFI = getFrameLowering(MF); in canRealignStack()
441 if (!TargetRegisterInfo::canRealignStack(MF)) in canRealignStack()
445 if (!MRI->canReserveReg(getFramePointerReg(MF.getSubtarget<ARMSubtarget>()))) in canRealignStack()
449 if (TFI->hasReservedCallFrame(MF)) in canRealignStack()
457 cannotEliminateFrame(const MachineFunction &MF) const { in cannotEliminateFrame()
458 const MachineFrameInfo &MFI = MF.getFrameInfo(); in cannotEliminateFrame()
459 if (MF.getTarget().Options.DisableFramePointerElim(MF) && MFI.adjustsStack()) in cannotEliminateFrame()
462 || needsStackRealignment(MF); in cannotEliminateFrame()
466 ARMBaseRegisterInfo::getFrameRegister(const MachineFunction &MF) const { in getFrameRegister()
467 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getFrameRegister()
468 const ARMFrameLowering *TFI = getFrameLowering(MF); in getFrameRegister()
470 if (TFI->hasFP(MF)) in getFrameRegister()
481 MachineFunction &MF = *MBB.getParent(); in emitLoadConstPool() local
482 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); in emitLoadConstPool()
483 MachineConstantPool *ConstantPool = MF.getConstantPool(); in emitLoadConstPool()
485 ConstantInt::get(Type::getInt32Ty(MF.getFunction().getContext()), Val); in emitLoadConstPool()
497 requiresRegisterScavenging(const MachineFunction &MF) const { in requiresRegisterScavenging()
502 requiresFrameIndexScavenging(const MachineFunction &MF) const { in requiresFrameIndexScavenging()
507 requiresVirtualBaseRegisters(const MachineFunction &MF) const { in requiresVirtualBaseRegisters()
596 MachineFunction &MF = *MI->getParent()->getParent(); in needsFrameBaseReg() local
597 const ARMFrameLowering *TFI = getFrameLowering(MF); in needsFrameBaseReg()
598 MachineFrameInfo &MFI = MF.getFrameInfo(); in needsFrameBaseReg()
599 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in needsFrameBaseReg()
623 if (TFI->hasFP(MF) && in needsFrameBaseReg()
625 canRealignStack(MF))) { in needsFrameBaseReg()
626 if (isFrameOffsetLegal(MI, getFrameRegister(MF), FPOffset)) in needsFrameBaseReg()
656 const MachineFunction &MF = *MBB->getParent(); in materializeFrameBaseRegister() local
658 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); in materializeFrameBaseRegister()
660 MRI.constrainRegClass(BaseReg, TII.getRegClass(MCID, 0, this, MF)); in materializeFrameBaseRegister()
672 MachineFunction &MF = *MBB.getParent(); in resolveFrameIndex() local
674 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo()); in resolveFrameIndex()
675 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in resolveFrameIndex()
769 MachineFunction &MF = *MBB.getParent(); in eliminateFrameIndex() local
771 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo()); in eliminateFrameIndex()
772 const ARMFrameLowering *TFI = getFrameLowering(MF); in eliminateFrameIndex()
773 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in eliminateFrameIndex()
779 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj); in eliminateFrameIndex()
787 assert(TFI->hasReservedCallFrame(MF) && in eliminateFrameIndex()
790 assert(!MF.getFrameInfo().hasVarSizedObjects() && in eliminateFrameIndex()
837 ScratchReg = MF.getRegInfo().createVirtualRegister(RegClass); in eliminateFrameIndex()
859 auto MF = MBB->getParent(); in shouldCoalesce() local
860 const MachineRegisterInfo &MRI = MF->getRegInfo(); in shouldCoalesce()
887 auto AFI = MF->getInfo<ARMFunctionInfo>(); in shouldCoalesce()