Lines Matching refs:Br
266 bool fixupImmediateBr(ImmBranch &Br);
267 bool fixupConditionalBr(ImmBranch &Br);
268 bool fixupUnconditionalBr(ImmBranch &Br);
1605 bool ARMConstantIslands::fixupImmediateBr(ImmBranch &Br) { in fixupImmediateBr() argument
1606 MachineInstr *MI = Br.MI; in fixupImmediateBr()
1610 if (BBUtils->isBBInRange(MI, DestBB, Br.MaxDisp)) in fixupImmediateBr()
1613 if (!Br.isCond) in fixupImmediateBr()
1614 return fixupUnconditionalBr(Br); in fixupImmediateBr()
1615 return fixupConditionalBr(Br); in fixupImmediateBr()
1623 ARMConstantIslands::fixupUnconditionalBr(ImmBranch &Br) { in fixupUnconditionalBr() argument
1624 MachineInstr *MI = Br.MI; in fixupUnconditionalBr()
1633 Br.MaxDisp = (1 << 21) * 2; in fixupUnconditionalBr()
1649 ARMConstantIslands::fixupConditionalBr(ImmBranch &Br) { in fixupConditionalBr() argument
1650 MachineInstr *MI = Br.MI; in fixupConditionalBr()
1674 BMI->getOpcode() == Br.UncondBr) { in fixupConditionalBr()
1683 if (BBUtils->isBBInRange(MI, NewDest, Br.MaxDisp)) { in fixupConditionalBr()
1720 Br.MI = &MBB->back(); in fixupConditionalBr()
1723 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr)) in fixupConditionalBr()
1727 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr)).addMBB(DestBB); in fixupConditionalBr()
1729 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr); in fixupConditionalBr()
1730 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr)); in fixupConditionalBr()
1795 auto TryShrinkBranch = [this](ImmBranch &Br) { in optimizeThumb2Branches() argument
1796 unsigned Opcode = Br.MI->getOpcode(); in optimizeThumb2Branches()
1815 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB(); in optimizeThumb2Branches()
1816 if (BBUtils->isBBInRange(Br.MI, DestBB, MaxOffs)) { in optimizeThumb2Branches()
1817 LLVM_DEBUG(dbgs() << "Shrink branch: " << *Br.MI); in optimizeThumb2Branches()
1818 Br.MI->setDesc(TII->get(NewOpc)); in optimizeThumb2Branches()
1819 MachineBasicBlock *MBB = Br.MI->getParent(); in optimizeThumb2Branches()
1834 auto FindCmpForCBZ = [this](ImmBranch &Br, ImmCompare &ImmCmp, in optimizeThumb2Branches()
1841 if (!Br.MI->killsRegister(ARM::CPSR)) in optimizeThumb2Branches()
1846 ARMCC::CondCodes Pred = getInstrPredicate(*Br.MI, PredReg); in optimizeThumb2Branches()
1856 unsigned BrOffset = BBUtils->getOffsetOf(Br.MI) + 4 - 2; in optimizeThumb2Branches()
1864 MachineInstr *CmpMI = findCMPToFoldIntoCBZ(Br.MI, TRI); in optimizeThumb2Branches()
1873 auto TryConvertToLE = [this](ImmBranch &Br, ImmCompare &Cmp) { in optimizeThumb2Branches() argument
1874 if (Br.MI->getOpcode() != ARM::t2Bcc || !STI->hasLOB() || in optimizeThumb2Branches()
1878 MachineBasicBlock *MBB = Br.MI->getParent(); in optimizeThumb2Branches()
1879 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB(); in optimizeThumb2Branches()
1881 !BBUtils->isBBInRange(Br.MI, DestBB, 4094)) in optimizeThumb2Branches()
1891 MachineInstrBuilder MIB = BuildMI(*MBB, Br.MI, Br.MI->getDebugLoc(), in optimizeThumb2Branches()
1894 MIB.add(Br.MI->getOperand(0)); in optimizeThumb2Branches()
1895 Br.MI->eraseFromParent(); in optimizeThumb2Branches()
1896 Br.MI = MIB; in optimizeThumb2Branches()
1908 for (ImmBranch &Br : reverse(ImmBranches)) { in optimizeThumb2Branches()
1909 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB(); in optimizeThumb2Branches()
1910 MachineBasicBlock *MBB = Br.MI->getParent(); in optimizeThumb2Branches()
1911 MachineBasicBlock *ExitBB = &MBB->back() == Br.MI ? in optimizeThumb2Branches()
1916 if (FindCmpForCBZ(Br, Cmp, ExitBB) && TryConvertToLE(Br, Cmp)) { in optimizeThumb2Branches()
1920 FindCmpForCBZ(Br, Cmp, DestBB); in optimizeThumb2Branches()
1921 MadeChange |= TryShrinkBranch(Br); in optimizeThumb2Branches()
1924 unsigned Opcode = Br.MI->getOpcode(); in optimizeThumb2Branches()
1933 MachineBasicBlock::iterator KillMI = Br.MI; in optimizeThumb2Branches()
1945 LLVM_DEBUG(dbgs() << "Fold: " << *Cmp.MI << " and: " << *Br.MI); in optimizeThumb2Branches()
1947 BuildMI(*MBB, Br.MI, Br.MI->getDebugLoc(), TII->get(Cmp.NewOpc)) in optimizeThumb2Branches()
1949 .addMBB(DestBB, Br.MI->getOperand(0).getTargetFlags()); in optimizeThumb2Branches()
1953 if (Br.MI->getOpcode() == ARM::tBcc) { in optimizeThumb2Branches()
1954 Br.MI->eraseFromParent(); in optimizeThumb2Branches()
1955 Br.MI = NewBR; in optimizeThumb2Branches()