1243   unsigned NextReg = ARM::D8;  in emitAlignedDPRCS2Spills()  local
1248     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Spills()
1254         .addReg(NextReg)  in emitAlignedDPRCS2Spills()
1257     NextReg += 4;  in emitAlignedDPRCS2Spills()
1263   unsigned R4BaseReg = NextReg;  in emitAlignedDPRCS2Spills()
1267     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Spills()
1273         .addReg(NextReg)  in emitAlignedDPRCS2Spills()
1276     NextReg += 4;  in emitAlignedDPRCS2Spills()
1282     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Spills()
1290     NextReg += 2;  in emitAlignedDPRCS2Spills()
1296     MBB.addLiveIn(NextReg);  in emitAlignedDPRCS2Spills()
1299         .addReg(NextReg)  in emitAlignedDPRCS2Spills()
1301         .addImm((NextReg - R4BaseReg) * 2)  in emitAlignedDPRCS2Spills()
1376   unsigned NextReg = ARM::D8;  in emitAlignedDPRCS2Restores()  local
1380     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Restores()
1382     BuildMI(MBB, MI, DL, TII.get(ARM::VLD1d64Qwb_fixed), NextReg)  in emitAlignedDPRCS2Restores()
1388     NextReg += 4;  in emitAlignedDPRCS2Restores()
1394   unsigned R4BaseReg = NextReg;  in emitAlignedDPRCS2Restores()
1398     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Restores()
1400     BuildMI(MBB, MI, DL, TII.get(ARM::VLD1d64Q), NextReg)  in emitAlignedDPRCS2Restores()
1405     NextReg += 4;  in emitAlignedDPRCS2Restores()
1411     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Restores()
1417     NextReg += 2;  in emitAlignedDPRCS2Restores()
1423     BuildMI(MBB, MI, DL, TII.get(ARM::VLDRD), NextReg)  in emitAlignedDPRCS2Restores()
1425         .addImm(2 * (NextReg - R4BaseReg))  in emitAlignedDPRCS2Restores()