Lines Matching refs:Reg0
2113 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLD() local
2135 Ops.push_back(Reg0); in SelectVLD()
2138 Ops.push_back(Reg0); in SelectVLD()
2151 const SDValue OpsA[] = { MemAddr, Align, Reg0, ImplDef, Pred, Reg0, Chain }; in SelectVLD()
2164 Ops.push_back(Reg0); in SelectVLD()
2168 Ops.push_back(Reg0); in SelectVLD()
2248 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVST() local
2295 Ops.push_back(Reg0); in SelectVST()
2299 Ops.push_back(Reg0); in SelectVST()
2324 const SDValue OpsA[] = { MemAddr, Align, Reg0, RegSeq, Pred, Reg0, Chain }; in SelectVST()
2339 Ops.push_back(Reg0); in SelectVST()
2343 Ops.push_back(Reg0); in SelectVST()
2421 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDSTLane() local
2430 Ops.push_back(IsImmUpdate ? Reg0 : Inc); in SelectVLDSTLane()
2454 Ops.push_back(Reg0); in SelectVLDSTLane()
2955 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDDup() local
2976 Ops.push_back(Reg0); in SelectVLDDup()
2979 Ops.push_back(Reg0); in SelectVLDDup()
2983 const SDValue OpsA[] = { MemAddr, Align, Pred, Reg0, Chain }; in SelectVLDDup()
2988 const SDValue OpsB[] = { MemAddr, Align, Pred, Reg0, Chain }; in SelectVLDDup()
2993 const SDValue OpsA[] = { MemAddr, Align, ImplDef, Pred, Reg0, Chain }; in SelectVLDDup()
2999 const SDValue OpsB[] = { MemAddr, Align, SuperReg, Pred, Reg0, Chain }; in SelectVLDDup()
3057 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3065 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
3076 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
3085 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3105 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3110 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3127 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3132 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3148 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3153 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3468 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3470 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
3474 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
3475 Reg0 }; in Select()
3487 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3489 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
3493 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
3494 Reg0 }; in Select()
4752 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
4753 SDValue Ops[] = { Src, Src, Pred, Reg0 }; in Select()
4763 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
4764 SDValue Ops[] = { Src, Pred, Reg0 }; in Select()
5344 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg(); in tryInlineAsm() local
5367 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in tryInlineAsm()
5382 SDValue T0 = CurDAG->getCopyFromReg(Chain, dl, Reg0, MVT::i32, in tryInlineAsm()