Lines Matching refs:SuperReg
2183 SDValue SuperReg = SDValue(VLd, 0); in SelectVLD() local
2190 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLD()
2433 SDValue SuperReg; in SelectVLDSTLane() local
2438 SuperReg = SDValue(createDRegPairNode(MVT::v2i64, V0, V1), 0); in SelectVLDSTLane()
2440 SuperReg = SDValue(createQRegPairNode(MVT::v4i64, V0, V1), 0); in SelectVLDSTLane()
2447 SuperReg = SDValue(createQuadDRegsNode(MVT::v4i64, V0, V1, V2, V3), 0); in SelectVLDSTLane()
2449 SuperReg = SDValue(createQuadQRegsNode(MVT::v8i64, V0, V1, V2, V3), 0); in SelectVLDSTLane()
2451 Ops.push_back(SuperReg); in SelectVLDSTLane()
2467 SuperReg = SDValue(VLdLn, 0); in SelectVLDSTLane()
2474 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLDSTLane()
2997 SDValue SuperReg = SDValue(VLdA, 0); in SelectVLDDup() local
2999 const SDValue OpsB[] = { MemAddr, Align, SuperReg, Pred, Reg0, Chain }; in SelectVLDDup()
3011 SDValue SuperReg = SDValue(VLdDup, 0); in SelectVLDDup() local
3016 CurDAG->getTargetExtractSubreg(SubIdx+Vec, dl, VT, SuperReg)); in SelectVLDDup()