Lines Matching refs:b0001

1268     let Inst{26-23} = 0b0001;
2467 def t2QADD16  : T2I_pam_intrinsics<0b001, 0b0001, "qadd16", int_arm_qadd16>;
2468 def t2QADD8   : T2I_pam_intrinsics<0b000, 0b0001, "qadd8", int_arm_qadd8>;
2469 def t2QASX    : T2I_pam_intrinsics<0b010, 0b0001, "qasx", int_arm_qasx>;
2471 def t2QSAX    : T2I_pam_intrinsics<0b110, 0b0001, "qsax", int_arm_qsax>;
2472 def t2QSUB16  : T2I_pam_intrinsics<0b101, 0b0001, "qsub16", int_arm_qsub16>;
2473 def t2QSUB8   : T2I_pam_intrinsics<0b100, 0b0001, "qsub8", int_arm_qsub8>;
2735 defm t2BIC  : T2I_bin_w_irs<0b0001, "bic",
2951 def t2MLS: T2FourRegMLA<0b0001, "mls",
2990   T2SMMUL<0b0001, "smmulr",
3007 def t2SMMLAR:   T2FourRegSMMLA<0b101, 0b0001, "smmlar",
3010 def t2SMMLSR:   T2FourRegSMMLA<0b110, 0b0001, "smmlsr",
3144 def t2SMUADX: T2DualHalfMul<0b010, 0b0001, "smuadx", int_arm_smuadx>;
3146 def t2SMUSDX: T2DualHalfMul<0b100, 0b0001, "smusdx", int_arm_smusdx>;
3158 def t2SMLADX  : T2DualHalfMulAdd<0b010, 0b0001, "smladx", int_arm_smladx>;
3160 def t2SMLSDX  : T2DualHalfMulAdd<0b100, 0b0001, "smlsdx", int_arm_smlsdx>;