Lines Matching refs:Dd
154 def VLDRD : ADI5<0b1101, 0b01, (outs DPR:$Dd), (ins addrmode5:$addr),
155 IIC_fpLoad64, "vldr", "\t$Dd, $addr",
156 [(set DPR:$Dd, (f64 (alignedload32 addrmode5:$addr)))]>,
189 def VSTRD : ADI5<0b1101, 0b00, (outs), (ins DPR:$Dd, addrmode5:$addr),
190 IIC_fpStore64, "vstr", "\t$Dd, $addr",
191 [(alignedstore32 (f64 DPR:$Dd), addrmode5:$addr)]>,
403 let TwoOperandAliasConstraint = "$Dn = $Dd" in
405 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
406 IIC_fpALU64, "vadd", ".f64\t$Dd, $Dn, $Dm",
407 [(set DPR:$Dd, (fadd DPR:$Dn, (f64 DPR:$Dm)))]>,
428 let TwoOperandAliasConstraint = "$Dn = $Dd" in
430 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
431 IIC_fpALU64, "vsub", ".f64\t$Dd, $Dn, $Dm",
432 [(set DPR:$Dd, (fsub DPR:$Dn, (f64 DPR:$Dm)))]>,
453 let TwoOperandAliasConstraint = "$Dn = $Dd" in
455 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
456 IIC_fpDIV64, "vdiv", ".f64\t$Dd, $Dn, $Dm",
457 [(set DPR:$Dd, (fdiv DPR:$Dn, (f64 DPR:$Dm)))]>,
474 let TwoOperandAliasConstraint = "$Dn = $Dd" in
476 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
477 IIC_fpMUL64, "vmul", ".f64\t$Dd, $Dn, $Dm",
478 [(set DPR:$Dd, (fmul DPR:$Dn, (f64 DPR:$Dm)))]>,
500 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
501 IIC_fpMUL64, "vnmul", ".f64\t$Dd, $Dn, $Dm",
502 [(set DPR:$Dd, (fneg (fmul DPR:$Dn, (f64 DPR:$Dm))))]>,
537 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
538 NoItinerary, !strconcat("vsel", op, ".f64\t$Dd, $Dn, $Dm"),
539 [(set DPR:$Dd, (ARMcmov (f64 DPR:$Dm), (f64 DPR:$Dn), CC))]>,
566 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
567 NoItinerary, !strconcat(op, ".f64\t$Dd, $Dn, $Dm"),
568 [(set DPR:$Dd, (f64 (SD (f64 DPR:$Dn), (f64 DPR:$Dm))))]>,
586 (outs), (ins DPR:$Dd, DPR:$Dm),
587 IIC_fpCMP64, "vcmpe", ".f64\t$Dd, $Dm",
588 [(arm_cmpfpe DPR:$Dd, (f64 DPR:$Dm))]>;
605 (outs), (ins DPR:$Dd, DPR:$Dm),
606 IIC_fpCMP64, "vcmp", ".f64\t$Dd, $Dm",
607 [(arm_cmpfp DPR:$Dd, (f64 DPR:$Dm))]>;
629 (outs DPR:$Dd), (ins DPR:$Dm),
630 IIC_fpUNA64, "vabs", ".f64\t$Dd, $Dm",
631 [(set DPR:$Dd, (fabs (f64 DPR:$Dm)))]>;
649 (outs), (ins DPR:$Dd),
650 IIC_fpCMP64, "vcmpe", ".f64\t$Dd, #0",
651 [(arm_cmpfpe0 (f64 DPR:$Dd))]> {
677 (outs), (ins DPR:$Dd),
678 IIC_fpCMP64, "vcmp", ".f64\t$Dd, #0",
679 [(arm_cmpfp0 (f64 DPR:$Dd))]> {
706 (outs DPR:$Dd), (ins SPR:$Sm),
707 IIC_fpCVTDS, "vcvt", ".f64.f32\t$Dd, $Sm",
708 [(set DPR:$Dd, (fpextend SPR:$Sm))]>,
711 bits<5> Dd;
717 let Inst{15-12} = Dd{3-0};
718 let Inst{22} = Dd{4};
809 (outs DPR:$Dd), (ins SPR:$Sm),
810 NoItinerary, "vcvtb", ".f64.f16\t$Dd, $Sm",
857 (outs DPR:$Dd), (ins SPR:$Sm),
858 NoItinerary, "vcvtt", ".f64.f16\t$Dd, $Sm",
992 (outs DPR:$Dd), (ins DPR:$Dm),
993 IIC_fpUNA64, "vneg", ".f64\t$Dd, $Dm",
994 [(set DPR:$Dd, (fneg (f64 DPR:$Dm)))]>;
1029 (outs DPR:$Dd), (ins DPR:$Dm),
1030 NoItinerary, !strconcat("vrint", opc), ".f64\t$Dd, $Dm",
1031 [(set (f64 DPR:$Dd), (node (f64 DPR:$Dm)))]>,
1043 def : InstAlias<!strconcat("vrint", opc, "$p.f64.f64\t$Dd, $Dm"),
1044 (!cast<Instruction>(NAME#"D") DPR:$Dd, DPR:$Dm, pred:$p), 0>,
1071 (outs DPR:$Dd), (ins DPR:$Dm),
1072 NoItinerary, !strconcat("vrint", opc, ".f64\t$Dd, $Dm"),
1073 [(set (f64 DPR:$Dd), (node (f64 DPR:$Dm)))]>,
1082 def : InstAlias<!strconcat("vrint", opc, ".f64.f64\t$Dd, $Dm"),
1083 (!cast<Instruction>(NAME#"D") DPR:$Dd, DPR:$Dm), 0>,
1093 (outs DPR:$Dd), (ins DPR:$Dm),
1094 IIC_fpSQRT64, "vsqrt", ".f64\t$Dd, $Dm",
1095 [(set DPR:$Dd, (fsqrt (f64 DPR:$Dm)))]>,
1112 (outs DPR:$Dd), (ins DPR:$Dm),
1113 IIC_fpUNA64, "vmov", ".f64\t$Dd, $Dm", []>,
1384 bits<5> Dd;
1390 let Inst{15-12} = Dd{3-0};
1391 let Inst{22} = Dd{4};
1436 (outs DPR:$Dd), (ins SPR:$Sm),
1437 IIC_fpCVTID, "vcvt", ".f64.s32\t$Dd, $Sm",
1482 (outs DPR:$Dd), (ins SPR:$Sm),
1483 IIC_fpCVTID, "vcvt", ".f64.u32\t$Dd, $Sm",
1991 (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
1992 IIC_fpMAC64, "vmla", ".f64\t$Dd, $Dn, $Dm",
1993 [(set DPR:$Dd, (fadd_mlx (fmul_su DPR:$Dn, DPR:$Dm),
1995 RegConstraint<"$Ddin = $Dd">,
2032 (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
2033 IIC_fpMAC64, "vmls", ".f64\t$Dd, $Dn, $Dm",
2034 [(set DPR:$Dd, (fadd_mlx (fneg (fmul_su DPR:$Dn,DPR:$Dm)),
2036 RegConstraint<"$Ddin = $Dd">,
2072 (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
2073 IIC_fpMAC64, "vnmla", ".f64\t$Dd, $Dn, $Dm",
2074 [(set DPR:$Dd,(fsub_mlx (fneg (fmul_su DPR:$Dn,DPR:$Dm)),
2076 RegConstraint<"$Ddin = $Dd">,
2124 (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
2125 IIC_fpMAC64, "vnmls", ".f64\t$Dd, $Dn, $Dm",
2126 [(set DPR:$Dd, (fsub_mlx (fmul_su DPR:$Dn, DPR:$Dm),
2128 RegConstraint<"$Ddin = $Dd">,
2165 (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
2166 IIC_fpFMAC64, "vfma", ".f64\t$Dd, $Dn, $Dm",
2167 [(set DPR:$Dd, (fadd_mlx (fmul_su DPR:$Dn, DPR:$Dm),
2169 RegConstraint<"$Ddin = $Dd">,
2217 (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
2218 IIC_fpFMAC64, "vfms", ".f64\t$Dd, $Dn, $Dm",
2219 [(set DPR:$Dd, (fadd_mlx (fneg (fmul_su DPR:$Dn,DPR:$Dm)),
2221 RegConstraint<"$Ddin = $Dd">,
2269 (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
2270 IIC_fpFMAC64, "vfnma", ".f64\t$Dd, $Dn, $Dm",
2271 [(set DPR:$Dd,(fsub_mlx (fneg (fmul_su DPR:$Dn,DPR:$Dm)),
2273 RegConstraint<"$Ddin = $Dd">,
2328 (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
2329 IIC_fpFMAC64, "vfnms", ".f64\t$Dd, $Dn, $Dm",
2330 [(set DPR:$Dd, (fsub_mlx (fmul_su DPR:$Dn, DPR:$Dm),
2332 RegConstraint<"$Ddin = $Dd">,
2390 def VMOVDcc : PseudoInst<(outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm, cmovpred:$p),
2392 [(set (f64 DPR:$Dd),
2394 RegConstraint<"$Dn = $Dd">, Requires<[HasFPRegs64]>;
2571 def FCONSTD : VFPAI<(outs DPR:$Dd), (ins vfp_f64imm:$imm),
2573 "vmov", ".f64\t$Dd, $imm",
2574 [(set DPR:$Dd, vfp_f64imm:$imm)]>,
2576 bits<5> Dd;
2580 let Inst{22} = Dd{4};
2583 let Inst{15-12} = Dd{3-0};
2689 def : VFP2DPInstAlias<"faddd${p} $Dd, $Dn, $Dm",
2690 (VADDD DPR:$Dd, DPR:$Dn, DPR:$Dm, pred:$p)>;
2693 def : VFP2DPInstAlias<"fsubd${p} $Dd, $Dn, $Dm",
2694 (VSUBD DPR:$Dd, DPR:$Dn, DPR:$Dm, pred:$p)>;
2698 def : VFP2DPInstAlias<"vsqrt${p} $Dd, $Dm", (VSQRTD DPR:$Dd, DPR:$Dm, pred:$p)>;
2705 def : VFP2InstAlias<"vldr${p}.64 $Dd, $addr",
2706 (VLDRD DPR:$Dd, addrmode5:$addr, pred:$p)>;
2707 def : VFP2InstAlias<"vstr${p}.64 $Dd, $addr",
2708 (VSTRD DPR:$Dd, addrmode5:$addr, pred:$p)>;
2740 def : VFP3InstAlias<"fconstd${p} $Dd, $val",
2741 (FCONSTD DPR:$Dd, vfp_f64imm:$val, pred:$p)>;