Lines Matching refs:ARMSubtarget
80 ARMSubtarget &ARMSubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies()
87 ARMFrameLowering *ARMSubtarget::initializeFrameLowering(StringRef CPU, in initializeFrameLowering()
89 ARMSubtarget &STI = initializeSubtargetDependencies(CPU, FS); in initializeFrameLowering()
96 ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU, in ARMSubtarget() function in ARMSubtarget
127 const CallLowering *ARMSubtarget::getCallLowering() const { in getCallLowering()
131 InstructionSelector *ARMSubtarget::getInstructionSelector() const { in getInstructionSelector()
135 const LegalizerInfo *ARMSubtarget::getLegalizerInfo() const { in getLegalizerInfo()
139 const RegisterBankInfo *ARMSubtarget::getRegBankInfo() const { in getRegBankInfo()
143 bool ARMSubtarget::isXRaySupported() const { in isXRaySupported()
148 void ARMSubtarget::initializeEnvironment() { in initializeEnvironment()
161 void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { in initSubtargetFeatures()
329 bool ARMSubtarget::isTargetHardFloat() const { return TM.isTargetHardFloat(); } in isTargetHardFloat()
331 bool ARMSubtarget::isAPCS_ABI() const { in isAPCS_ABI()
335 bool ARMSubtarget::isAAPCS_ABI() const { in isAAPCS_ABI()
340 bool ARMSubtarget::isAAPCS16_ABI() const { in isAAPCS16_ABI()
345 bool ARMSubtarget::isROPI() const { in isROPI()
349 bool ARMSubtarget::isRWPI() const { in isRWPI()
354 bool ARMSubtarget::isGVIndirectSymbol(const GlobalValue *GV) const { in isGVIndirectSymbol()
368 bool ARMSubtarget::isGVInGOT(const GlobalValue *GV) const { in isGVInGOT()
373 unsigned ARMSubtarget::getMispredictionPenalty() const { in getMispredictionPenalty()
377 bool ARMSubtarget::enableMachineScheduler() const { in enableMachineScheduler()
390 bool ARMSubtarget::enableSubRegLiveness() const { return EnableSubRegLiveness; } in enableSubRegLiveness()
393 bool ARMSubtarget::enablePostRAScheduler() const { in enablePostRAScheduler()
402 bool ARMSubtarget::enablePostRAMachineScheduler() const { in enablePostRAMachineScheduler()
410 bool ARMSubtarget::enableAtomicExpand() const { return hasAnyDataBarrier(); } in enableAtomicExpand()
412 bool ARMSubtarget::useStride4VFPs() const { in useStride4VFPs()
420 bool ARMSubtarget::useMovt() const { in useMovt()
428 bool ARMSubtarget::useFastISel() const { in useFastISel()
443 unsigned ARMSubtarget::getGPRAllocationOrder(const MachineFunction &MF) const { in getGPRAllocationOrder()
474 bool ARMSubtarget::ignoreCSRForAllocationOrder(const MachineFunction &MF, in ignoreCSRForAllocationOrder()