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Lines Matching refs:DestReg

63                                     const DebugLoc &dl, unsigned DestReg,  in emitThumb1LoadConstPool()  argument
76 .addReg(DestReg, getDefRegState(true), SubIdx) in emitThumb1LoadConstPool()
83 const DebugLoc &dl, unsigned DestReg, in emitThumb2LoadConstPool() argument
95 .addReg(DestReg, getDefRegState(true), SubIdx) in emitThumb2LoadConstPool()
105 const DebugLoc &dl, Register DestReg, unsigned SubIdx, int Val, in emitLoadConstPool() argument
110 assert((isARMLowRegister(DestReg) || DestReg.isVirtual()) && in emitLoadConstPool()
112 return emitThumb1LoadConstPool(MBB, MBBI, dl, DestReg, SubIdx, Val, Pred, in emitLoadConstPool()
115 return emitThumb2LoadConstPool(MBB, MBBI, dl, DestReg, SubIdx, Val, Pred, in emitLoadConstPool()
125 const DebugLoc &dl, Register DestReg, Register BaseReg, int NumBytes, in emitThumbRegPlusImmInReg() argument
130 bool isHigh = !isARMLowRegister(DestReg) || in emitThumbRegPlusImmInReg()
141 Register LdReg = DestReg; in emitThumbRegPlusImmInReg()
142 if (DestReg == ARM::SP) in emitThumbRegPlusImmInReg()
144 if (!isARMLowRegister(DestReg) && !Register::isVirtualRegister(DestReg)) in emitThumbRegPlusImmInReg()
171 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); in emitThumbRegPlusImmInReg()
174 if (DestReg == ARM::SP || isSub) in emitThumbRegPlusImmInReg()
187 const DebugLoc &dl, Register DestReg, in emitThumbRegPlusImmediate() argument
218 if (DestReg == ARM::SP) { in emitThumbRegPlusImmediate()
230 } else if (isARMLowRegister(DestReg)) { in emitThumbRegPlusImmediate()
237 } else if (DestReg == BaseReg) { in emitThumbRegPlusImmediate()
254 if (DestReg == BaseReg) { in emitThumbRegPlusImmediate()
296 unsigned Threshold = (DestReg == ARM::SP) ? 3 : 2; in emitThumbRegPlusImmediate()
301 DestReg, BaseReg, NumBytes, true, in emitThumbRegPlusImmediate()
311 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(CopyOpc), DestReg); in emitThumbRegPlusImmediate()
320 BaseReg = DestReg; in emitThumbRegPlusImmediate()
328 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(ExtraOpc), DestReg); in emitThumbRegPlusImmediate()
374 Register DestReg = MI.getOperand(0).getReg(); in rewriteFrameIndex() local
376 emitThumbRegPlusImmediate(MBB, II, dl, DestReg, FrameReg, Offset, TII, in rewriteFrameIndex()