Lines Matching refs:AVR
39 addRegisterClass(MVT::i8, &AVR::GPR8RegClass); in AVRTargetLowering()
40 addRegisterClass(MVT::i16, &AVR::DREGSRegClass); in AVRTargetLowering()
48 setStackPointerRegisterToSaveRestore(AVR::SP); in AVRTargetLowering()
754 if (isa<PointerType>(Ty) && AS == AVR::ProgramMemory) { in isLegalAddressingMode()
784 if (AVR::isProgramMemoryAccess(LD)) { in getPreIndexedAddressParts()
790 if (AVR::isProgramMemoryAccess(ST)) { in getPreIndexedAddressParts()
841 if (AVR::isProgramMemoryAccess(ST)) { in getPostIndexedAddressParts()
888 AVR::R25, AVR::R24, AVR::R23, AVR::R22, AVR::R21, AVR::R20,
889 AVR::R19, AVR::R18, AVR::R17, AVR::R16, AVR::R15, AVR::R14,
890 AVR::R13, AVR::R12, AVR::R11, AVR::R10, AVR::R9, AVR::R8};
892 AVR::R26R25, AVR::R25R24, AVR::R24R23, AVR::R23R22,
893 AVR::R22R21, AVR::R21R20, AVR::R20R19, AVR::R19R18,
894 AVR::R18R17, AVR::R17R16, AVR::R16R15, AVR::R15R14,
895 AVR::R14R13, AVR::R13R12, AVR::R12R11, AVR::R11R10,
896 AVR::R10R9, AVR::R9R8};
1048 RC = &AVR::GPR8RegClass; in LowerFormalArguments()
1050 RC = &AVR::DREGSRegClass; in LowerFormalArguments()
1227 DAG.getRegister(AVR::SP, getPointerTy(DAG.getDataLayout())), in LowerCall()
1410 case AVR::Lsl8: in insertShift()
1411 Opc = AVR::ADDRdRr; // LSL is an alias of ADD Rd, Rd in insertShift()
1412 RC = &AVR::GPR8RegClass; in insertShift()
1415 case AVR::Lsl16: in insertShift()
1416 Opc = AVR::LSLWRd; in insertShift()
1417 RC = &AVR::DREGSRegClass; in insertShift()
1419 case AVR::Asr8: in insertShift()
1420 Opc = AVR::ASRRd; in insertShift()
1421 RC = &AVR::GPR8RegClass; in insertShift()
1423 case AVR::Asr16: in insertShift()
1424 Opc = AVR::ASRWRd; in insertShift()
1425 RC = &AVR::DREGSRegClass; in insertShift()
1427 case AVR::Lsr8: in insertShift()
1428 Opc = AVR::LSRRd; in insertShift()
1429 RC = &AVR::GPR8RegClass; in insertShift()
1431 case AVR::Lsr16: in insertShift()
1432 Opc = AVR::LSRWRd; in insertShift()
1433 RC = &AVR::DREGSRegClass; in insertShift()
1435 case AVR::Rol8: in insertShift()
1436 Opc = AVR::ROLBRd; in insertShift()
1437 RC = &AVR::GPR8RegClass; in insertShift()
1439 case AVR::Rol16: in insertShift()
1440 Opc = AVR::ROLWRd; in insertShift()
1441 RC = &AVR::DREGSRegClass; in insertShift()
1443 case AVR::Ror8: in insertShift()
1444 Opc = AVR::RORBRd; in insertShift()
1445 RC = &AVR::GPR8RegClass; in insertShift()
1447 case AVR::Ror16: in insertShift()
1448 Opc = AVR::RORWRd; in insertShift()
1449 RC = &AVR::DREGSRegClass; in insertShift()
1480 Register ShiftAmtReg = RI.createVirtualRegister(&AVR::GPR8RegClass); in insertShift()
1481 Register ShiftAmtReg2 = RI.createVirtualRegister(&AVR::GPR8RegClass); in insertShift()
1490 BuildMI(BB, dl, TII.get(AVR::RJMPk)).addMBB(CheckBB); in insertShift()
1504 BuildMI(CheckBB, dl, TII.get(AVR::PHI), ShiftReg) in insertShift()
1509 BuildMI(CheckBB, dl, TII.get(AVR::PHI), ShiftAmtReg) in insertShift()
1514 BuildMI(CheckBB, dl, TII.get(AVR::PHI), DstReg) in insertShift()
1520 BuildMI(CheckBB, dl, TII.get(AVR::DECRd), ShiftAmtReg2) in insertShift()
1522 BuildMI(CheckBB, dl, TII.get(AVR::BRPLk)).addMBB(LoopBB); in insertShift()
1529 if (I->getOpcode() == AVR::COPY) { in isCopyMulResult()
1531 return (SrcReg == AVR::R0 || SrcReg == AVR::R1); in isCopyMulResult()
1549 BuildMI(*BB, I, MI.getDebugLoc(), TII.get(AVR::EORRdRr), AVR::R1) in insertMul()
1550 .addReg(AVR::R1) in insertMul()
1551 .addReg(AVR::R1); in insertMul()
1563 case AVR::Lsl8: in EmitInstrWithCustomInserter()
1564 case AVR::Lsl16: in EmitInstrWithCustomInserter()
1565 case AVR::Lsr8: in EmitInstrWithCustomInserter()
1566 case AVR::Lsr16: in EmitInstrWithCustomInserter()
1567 case AVR::Rol8: in EmitInstrWithCustomInserter()
1568 case AVR::Rol16: in EmitInstrWithCustomInserter()
1569 case AVR::Ror8: in EmitInstrWithCustomInserter()
1570 case AVR::Ror16: in EmitInstrWithCustomInserter()
1571 case AVR::Asr8: in EmitInstrWithCustomInserter()
1572 case AVR::Asr16: in EmitInstrWithCustomInserter()
1574 case AVR::MULRdRr: in EmitInstrWithCustomInserter()
1575 case AVR::MULSRdRr: in EmitInstrWithCustomInserter()
1579 assert((Opc == AVR::Select16 || Opc == AVR::Select8) && in EmitInstrWithCustomInserter()
1602 BuildMI(MBB, dl, TII.get(AVR::RJMPk)).addMBB(FallThrough); in EmitInstrWithCustomInserter()
1623 BuildMI(MBB, dl, TII.get(AVR::RJMPk)).addMBB(falseMBB); in EmitInstrWithCustomInserter()
1628 BuildMI(falseMBB, dl, TII.get(AVR::RJMPk)).addMBB(trueMBB); in EmitInstrWithCustomInserter()
1632 BuildMI(*trueMBB, trueMBB->begin(), dl, TII.get(AVR::PHI), MI.getOperand(0).getReg()) in EmitInstrWithCustomInserter()
1822 return std::make_pair(0U, &AVR::LD8loRegClass); in getRegForInlineAsmConstraint()
1824 return std::make_pair(0U, &AVR::PTRDISPREGSRegClass); in getRegForInlineAsmConstraint()
1826 return std::make_pair(0U, &AVR::LD8RegClass); in getRegForInlineAsmConstraint()
1828 return std::make_pair(0U, &AVR::GPR8loRegClass); in getRegForInlineAsmConstraint()
1830 return std::make_pair(0U, &AVR::PTRREGSRegClass); in getRegForInlineAsmConstraint()
1832 return std::make_pair(0U, &AVR::GPRSPRegClass); in getRegForInlineAsmConstraint()
1835 return std::make_pair(0U, &AVR::GPR8RegClass); in getRegForInlineAsmConstraint()
1838 return std::make_pair(0U, &AVR::DREGSRegClass); in getRegForInlineAsmConstraint()
1840 return std::make_pair(unsigned(AVR::R0), &AVR::GPR8RegClass); in getRegForInlineAsmConstraint()
1842 return std::make_pair(0U, &AVR::IWREGSRegClass); in getRegForInlineAsmConstraint()
1845 return std::make_pair(unsigned(AVR::R27R26), &AVR::PTRREGSRegClass); in getRegForInlineAsmConstraint()
1848 return std::make_pair(unsigned(AVR::R29R28), &AVR::PTRREGSRegClass); in getRegForInlineAsmConstraint()
1851 return std::make_pair(unsigned(AVR::R31R30), &AVR::PTRREGSRegClass); in getRegForInlineAsmConstraint()
1974 .Case("r0", AVR::R0).Case("r1", AVR::R1).Case("r2", AVR::R2) in getRegisterByName()
1975 .Case("r3", AVR::R3).Case("r4", AVR::R4).Case("r5", AVR::R5) in getRegisterByName()
1976 .Case("r6", AVR::R6).Case("r7", AVR::R7).Case("r8", AVR::R8) in getRegisterByName()
1977 .Case("r9", AVR::R9).Case("r10", AVR::R10).Case("r11", AVR::R11) in getRegisterByName()
1978 .Case("r12", AVR::R12).Case("r13", AVR::R13).Case("r14", AVR::R14) in getRegisterByName()
1979 .Case("r15", AVR::R15).Case("r16", AVR::R16).Case("r17", AVR::R17) in getRegisterByName()
1980 .Case("r18", AVR::R18).Case("r19", AVR::R19).Case("r20", AVR::R20) in getRegisterByName()
1981 .Case("r21", AVR::R21).Case("r22", AVR::R22).Case("r23", AVR::R23) in getRegisterByName()
1982 .Case("r24", AVR::R24).Case("r25", AVR::R25).Case("r26", AVR::R26) in getRegisterByName()
1983 .Case("r27", AVR::R27).Case("r28", AVR::R28).Case("r29", AVR::R29) in getRegisterByName()
1984 .Case("r30", AVR::R30).Case("r31", AVR::R31) in getRegisterByName()
1985 .Case("X", AVR::R27R26).Case("Y", AVR::R29R28).Case("Z", AVR::R31R30) in getRegisterByName()
1989 .Case("r0", AVR::R1R0).Case("r2", AVR::R3R2) in getRegisterByName()
1990 .Case("r4", AVR::R5R4).Case("r6", AVR::R7R6) in getRegisterByName()
1991 .Case("r8", AVR::R9R8).Case("r10", AVR::R11R10) in getRegisterByName()
1992 .Case("r12", AVR::R13R12).Case("r14", AVR::R15R14) in getRegisterByName()
1993 .Case("r16", AVR::R17R16).Case("r18", AVR::R19R18) in getRegisterByName()
1994 .Case("r20", AVR::R21R20).Case("r22", AVR::R23R22) in getRegisterByName()
1995 .Case("r24", AVR::R25R24).Case("r26", AVR::R27R26) in getRegisterByName()
1996 .Case("r28", AVR::R29R28).Case("r30", AVR::R31R30) in getRegisterByName()
1997 .Case("X", AVR::R27R26).Case("Y", AVR::R29R28).Case("Z", AVR::R31R30) in getRegisterByName()