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Lines Matching refs:FB

457   MachineBasicBlock *TB = nullptr, *FB = nullptr;  in findInductionRegister()  local
458 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false); in findInductionRegister()
618 MachineBasicBlock *TB = nullptr, *FB = nullptr; in getLoopTripCount() local
619 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false); in getLoopTripCount()
628 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) { in getLoopTripCount()
637 FB = (LTB == Header) ? LTB: LFB; in getLoopTripCount()
639 assert ((!FB || TB == Header || FB == Header) && "Branches not to header?"); in getLoopTripCount()
640 if (!TB || (FB && TB != Header && FB != Header)) in getLoopTripCount()
1224 MachineBasicBlock *TB = nullptr, *FB = nullptr; in convertToHardwareLoop() local
1227 if (TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false)) in convertToHardwareLoop()
1232 else if (L->contains(FB)) in convertToHardwareLoop()
1233 LoopStart = FB; in convertToHardwareLoop()
1658 MachineBasicBlock *TB = nullptr, *FB = nullptr; in fixupInductionVariable() local
1661 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false); in fixupInductionVariable()
1665 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) { in fixupInductionVariable()
1677 FB = (LTB == Header) ? LTB : LFB; in fixupInductionVariable()
1680 if (FB != Header) { in fixupInductionVariable()
1690 if (MDT->dominates(TB, FB)) in fixupInductionVariable()
1878 MachineBasicBlock *TB = nullptr, *FB = nullptr; in createPreheaderForLoop() local
1880 if (TII->analyzeBranch(*ExitingBlock, TB, FB, Tmp1, false)) in createPreheaderForLoop()
1885 bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp1, false); in createPreheaderForLoop()
1964 TB = FB = nullptr; in createPreheaderForLoop()
1970 bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp2, false); in createPreheaderForLoop()
1973 if (TB != Header && (Tmp2.empty() || FB != Header)) in createPreheaderForLoop()
1981 TB = FB = nullptr; in createPreheaderForLoop()
1982 bool LatchNotAnalyzed = TII->analyzeBranch(*Latch, TB, FB, Tmp2, false); in createPreheaderForLoop()
1985 if (!TB && !FB) in createPreheaderForLoop()