Lines Matching refs:v32i32
15 def : Pat < (v16i32 (int_hexagon_V6_lo (v32i32 HvxWR:$src1))),
16 (v16i32 (EXTRACT_SUBREG (v32i32 HvxWR:$src1), vsub_lo)) >;
18 def : Pat < (v16i32 (int_hexagon_V6_hi (v32i32 HvxWR:$src1))),
19 (v16i32 (EXTRACT_SUBREG (v32i32 HvxWR:$src1), vsub_hi)) >;
21 def : Pat < (v32i32 (int_hexagon_V6_lo_128B (v64i32 HvxWR:$src1))),
22 (v32i32 (EXTRACT_SUBREG (v64i32 HvxWR:$src1), vsub_lo)) >;
24 def : Pat < (v32i32 (int_hexagon_V6_hi_128B (v64i32 HvxWR:$src1))),
25 (v32i32 (EXTRACT_SUBREG (v64i32 HvxWR:$src1), vsub_hi)) >;
46 def : Pat <(v128i1 (bitconvert (v32i32 HvxVR:$src1))),
47 (v128i1 (V6_vandvrt (v32i32 HvxVR:$src1), (A2_tfrsi 0x01010101)))>;
55 def : Pat <(v32i32 (bitconvert (v128i1 HvxQR:$src1))),
56 (v32i32 (V6_vandqrt (v128i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>;
76 (v32i32 (V6_vandqrt (v128i1 HvxQR:$src1),
81 (v32i32 (V6_vL32b_ai IntRegs:$addr, 0)), (A2_tfrsi 0x01010101)))>;
637 (v32i32 (V6_hi HvxWR:$Vdd)),
638 (v32i32 (V6_lo HvxWR:$Vdd))))>;