202     SmallVector<SDep, 4> Erase;  in apply()
204       if (D.getKind() == SDep::Output && D.getReg() == Hexagon::USR_OVF)  in apply()
222     for (SDep &SI : SU.Succs) {  in apply()
223       if (SI.getKind() != SDep::Order || SI.getLatency() != 0)  in apply()
232         for (SDep &PI : SI.getSUnit()->Preds) {  in apply()
233           if (PI.getSUnit() != &SU || PI.getKind() != SDep::Order)  in apply()
281       DAG->addEdge(&DAG->SUnits[su], SDep(LastSequentialCall, SDep::Barrier));  in apply()
285       DAG->addEdge(&DAG->SUnits[su], SDep(&DAG->SUnits[su-1], SDep::Barrier));  in apply()
322                 DAG->addEdge(&DAG->SUnits[su], SDep(LastVRegUse[*AI], SDep::Barrier));  in apply()
372       SDep A(&S0, SDep::Artificial);  in apply()
391                                              SDep &Dep) const {  in adjustSchedDependency()
473       MachineInstr &DstInst, SDep &Dep) const {  in updateLatency()
512     SDep T = I;  in restoreLatency()
542     SDep T = I;  in changeLatency()
554 static SUnit *getZeroLatency(SUnit *N, SmallVector<SDep, 4> &Deps) {  in getZeroLatency()  argument