Lines Matching refs:SETCC_INVALID
159 { RTLIB::FPROUND_F64_F32, "__mspabi_cvtdf", ISD::SETCC_INVALID }, in MSP430TargetLowering()
160 { RTLIB::FPEXT_F32_F64, "__mspabi_cvtfd", ISD::SETCC_INVALID }, in MSP430TargetLowering()
163 { RTLIB::FPTOSINT_F64_I32, "__mspabi_fixdli", ISD::SETCC_INVALID }, in MSP430TargetLowering()
164 { RTLIB::FPTOSINT_F64_I64, "__mspabi_fixdlli", ISD::SETCC_INVALID }, in MSP430TargetLowering()
167 { RTLIB::FPTOUINT_F64_I32, "__mspabi_fixdul", ISD::SETCC_INVALID }, in MSP430TargetLowering()
168 { RTLIB::FPTOUINT_F64_I64, "__mspabi_fixdull", ISD::SETCC_INVALID }, in MSP430TargetLowering()
171 { RTLIB::FPTOSINT_F32_I32, "__mspabi_fixfli", ISD::SETCC_INVALID }, in MSP430TargetLowering()
172 { RTLIB::FPTOSINT_F32_I64, "__mspabi_fixflli", ISD::SETCC_INVALID }, in MSP430TargetLowering()
175 { RTLIB::FPTOUINT_F32_I32, "__mspabi_fixful", ISD::SETCC_INVALID }, in MSP430TargetLowering()
176 { RTLIB::FPTOUINT_F32_I64, "__mspabi_fixfull", ISD::SETCC_INVALID }, in MSP430TargetLowering()
179 { RTLIB::SINTTOFP_I32_F64, "__mspabi_fltlid", ISD::SETCC_INVALID }, in MSP430TargetLowering()
181 { RTLIB::SINTTOFP_I64_F64, "__mspabi_fltllid", ISD::SETCC_INVALID }, in MSP430TargetLowering()
184 { RTLIB::UINTTOFP_I32_F64, "__mspabi_fltuld", ISD::SETCC_INVALID }, in MSP430TargetLowering()
186 { RTLIB::UINTTOFP_I64_F64, "__mspabi_fltulld", ISD::SETCC_INVALID }, in MSP430TargetLowering()
189 { RTLIB::SINTTOFP_I32_F32, "__mspabi_fltlif", ISD::SETCC_INVALID }, in MSP430TargetLowering()
191 { RTLIB::SINTTOFP_I64_F32, "__mspabi_fltllif", ISD::SETCC_INVALID }, in MSP430TargetLowering()
194 { RTLIB::UINTTOFP_I32_F32, "__mspabi_fltulf", ISD::SETCC_INVALID }, in MSP430TargetLowering()
196 { RTLIB::UINTTOFP_I64_F32, "__mspabi_fltullf", ISD::SETCC_INVALID }, in MSP430TargetLowering()
213 { RTLIB::ADD_F64, "__mspabi_addd", ISD::SETCC_INVALID }, in MSP430TargetLowering()
214 { RTLIB::ADD_F32, "__mspabi_addf", ISD::SETCC_INVALID }, in MSP430TargetLowering()
215 { RTLIB::DIV_F64, "__mspabi_divd", ISD::SETCC_INVALID }, in MSP430TargetLowering()
216 { RTLIB::DIV_F32, "__mspabi_divf", ISD::SETCC_INVALID }, in MSP430TargetLowering()
217 { RTLIB::MUL_F64, "__mspabi_mpyd", ISD::SETCC_INVALID }, in MSP430TargetLowering()
218 { RTLIB::MUL_F32, "__mspabi_mpyf", ISD::SETCC_INVALID }, in MSP430TargetLowering()
219 { RTLIB::SUB_F64, "__mspabi_subd", ISD::SETCC_INVALID }, in MSP430TargetLowering()
220 { RTLIB::SUB_F32, "__mspabi_subf", ISD::SETCC_INVALID }, in MSP430TargetLowering()
226 { RTLIB::SDIV_I16, "__mspabi_divi", ISD::SETCC_INVALID }, in MSP430TargetLowering()
227 { RTLIB::SDIV_I32, "__mspabi_divli", ISD::SETCC_INVALID }, in MSP430TargetLowering()
228 { RTLIB::SDIV_I64, "__mspabi_divlli", ISD::SETCC_INVALID }, in MSP430TargetLowering()
229 { RTLIB::UDIV_I16, "__mspabi_divu", ISD::SETCC_INVALID }, in MSP430TargetLowering()
230 { RTLIB::UDIV_I32, "__mspabi_divul", ISD::SETCC_INVALID }, in MSP430TargetLowering()
231 { RTLIB::UDIV_I64, "__mspabi_divull", ISD::SETCC_INVALID }, in MSP430TargetLowering()
232 { RTLIB::SREM_I16, "__mspabi_remi", ISD::SETCC_INVALID }, in MSP430TargetLowering()
233 { RTLIB::SREM_I32, "__mspabi_remli", ISD::SETCC_INVALID }, in MSP430TargetLowering()
234 { RTLIB::SREM_I64, "__mspabi_remlli", ISD::SETCC_INVALID }, in MSP430TargetLowering()
235 { RTLIB::UREM_I16, "__mspabi_remu", ISD::SETCC_INVALID }, in MSP430TargetLowering()
236 { RTLIB::UREM_I32, "__mspabi_remul", ISD::SETCC_INVALID }, in MSP430TargetLowering()
237 { RTLIB::UREM_I64, "__mspabi_remull", ISD::SETCC_INVALID }, in MSP430TargetLowering()
241 { RTLIB::SRL_I32, "__mspabi_srll", ISD::SETCC_INVALID }, in MSP430TargetLowering()
242 { RTLIB::SRA_I32, "__mspabi_sral", ISD::SETCC_INVALID }, in MSP430TargetLowering()
243 { RTLIB::SHL_I32, "__mspabi_slll", ISD::SETCC_INVALID }, in MSP430TargetLowering()
250 if (LC.Cond != ISD::SETCC_INVALID) in MSP430TargetLowering()