879     struct RegIdxOp RegIdx;  member
894     Op->RegIdx.Index = Index;  in CreateReg()
895     Op->RegIdx.RegInfo = RegInfo;  in CreateReg()
896     Op->RegIdx.Kind = RegKind;  in CreateReg()
897     Op->RegIdx.Tok.Data = Str.data();  in CreateReg()
898     Op->RegIdx.Tok.Length = Str.size();  in CreateReg()
908     assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!");  in getGPR32Reg()
909     AsmParser.warnIfRegIndexIsAT(RegIdx.Index, StartLoc);  in getGPR32Reg()
911     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getGPR32Reg()
917     assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!");  in getGPRMM16Reg()
919     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getGPRMM16Reg()
925     assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!");  in getGPR64Reg()
927     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getGPR64Reg()
934     assert(isRegIdx() && (RegIdx.Kind & RegKind_FGR) && "Invalid access!");  in getAFGR64Reg()
935     if (RegIdx.Index % 2 != 0)  in getAFGR64Reg()
937     return RegIdx.RegInfo->getRegClass(Mips::AFGR64RegClassID)  in getAFGR64Reg()
938         .getRegister(RegIdx.Index / 2);  in getAFGR64Reg()
944     assert(isRegIdx() && (RegIdx.Kind & RegKind_FGR) && "Invalid access!");  in getFGR64Reg()
945     return RegIdx.RegInfo->getRegClass(Mips::FGR64RegClassID)  in getFGR64Reg()
946         .getRegister(RegIdx.Index);  in getFGR64Reg()
952     assert(isRegIdx() && (RegIdx.Kind & RegKind_FGR) && "Invalid access!");  in getFGR32Reg()
953     return RegIdx.RegInfo->getRegClass(Mips::FGR32RegClassID)  in getFGR32Reg()
954         .getRegister(RegIdx.Index);  in getFGR32Reg()
960     assert(isRegIdx() && (RegIdx.Kind & RegKind_FCC) && "Invalid access!");  in getFCCReg()
961     return RegIdx.RegInfo->getRegClass(Mips::FCCRegClassID)  in getFCCReg()
962         .getRegister(RegIdx.Index);  in getFCCReg()
968     assert(isRegIdx() && (RegIdx.Kind & RegKind_MSA128) && "Invalid access!");  in getMSA128Reg()
972     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getMSA128Reg()
978     assert(isRegIdx() && (RegIdx.Kind & RegKind_MSACtrl) && "Invalid access!");  in getMSACtrlReg()
980     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getMSACtrlReg()
986     assert(isRegIdx() && (RegIdx.Kind & RegKind_COP0) && "Invalid access!");  in getCOP0Reg()
988     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getCOP0Reg()
994     assert(isRegIdx() && (RegIdx.Kind & RegKind_COP2) && "Invalid access!");  in getCOP2Reg()
996     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getCOP2Reg()
1002     assert(isRegIdx() && (RegIdx.Kind & RegKind_COP3) && "Invalid access!");  in getCOP3Reg()
1004     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getCOP3Reg()
1010     assert(isRegIdx() && (RegIdx.Kind & RegKind_ACC) && "Invalid access!");  in getACC64DSPReg()
1012     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getACC64DSPReg()
1018     assert(isRegIdx() && (RegIdx.Kind & RegKind_ACC) && "Invalid access!");  in getHI32DSPReg()
1020     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getHI32DSPReg()
1026     assert(isRegIdx() && (RegIdx.Kind & RegKind_ACC) && "Invalid access!");  in getLO32DSPReg()
1028     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getLO32DSPReg()
1034     assert(isRegIdx() && (RegIdx.Kind & RegKind_CCR) && "Invalid access!");  in getCCRReg()
1036     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getCCRReg()
1042     assert(isRegIdx() && (RegIdx.Kind & RegKind_HWRegs) && "Invalid access!");  in getHWRegsReg()
1044     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getHWRegsReg()
1139     if (!AsmParser.useOddSPReg() && RegIdx.Index & 1)  in addFGR32AsmRegOperands()
1149     if (!AsmParser.useOddSPReg() && RegIdx.Index & 1)  in addStrictlyFGR32AsmRegOperands()
1283     return isGPRAsmReg() && RegIdx.Index == 0;  in isReg()
1452     if (Kind == k_RegisterIndex && RegIdx.Index == 0 &&  in getReg()
1453         RegIdx.Kind & RegKind_GPR)  in getReg()
1599     return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index == 0;  in isGPRZeroAsmReg()
1603    return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index > 0 &&  in isGPRNonZeroAsmReg()
1604           RegIdx.Index <= 31;  in isGPRNonZeroAsmReg()
1608     return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index <= 31;  in isGPRAsmReg()
1612     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmReg()
1614     return ((RegIdx.Index >= 2 && RegIdx.Index <= 7)  in isMM16AsmReg()
1615             || RegIdx.Index == 16 || RegIdx.Index == 17);  in isMM16AsmReg()
1619     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmRegZero()
1621     return (RegIdx.Index == 0 ||  in isMM16AsmRegZero()
1622             (RegIdx.Index >= 2 && RegIdx.Index <= 7) ||  in isMM16AsmRegZero()
1623             RegIdx.Index == 17);  in isMM16AsmRegZero()
1627     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmRegMoveP()
1629     return (RegIdx.Index == 0 || (RegIdx.Index >= 2 && RegIdx.Index <= 3) ||  in isMM16AsmRegMoveP()
1630       (RegIdx.Index >= 16 && RegIdx.Index <= 20));  in isMM16AsmRegMoveP()
1634     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmRegMovePPairFirst()
1636     return RegIdx.Index >= 4 && RegIdx.Index <= 6;  in isMM16AsmRegMovePPairFirst()
1640     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmRegMovePPairSecond()
1642     return (RegIdx.Index == 21 || RegIdx.Index == 22 ||  in isMM16AsmRegMovePPairSecond()
1643       (RegIdx.Index >= 5 && RegIdx.Index <= 7));  in isMM16AsmRegMovePPairSecond()
1648     return isRegIdx() && RegIdx.Kind & RegKind_FGR && RegIdx.Index <= 31;  in isFGRAsmReg()
1653     return isRegIdx() && RegIdx.Kind == RegKind_FGR && RegIdx.Index <= 31;  in isStrictlyFGRAsmReg()
1657     return isRegIdx() && RegIdx.Kind & RegKind_HWRegs && RegIdx.Index <= 31;  in isHWRegsAsmReg()
1661     return isRegIdx() && RegIdx.Kind & RegKind_CCR && RegIdx.Index <= 31;  in isCCRAsmReg()
1665     if (!(isRegIdx() && RegIdx.Kind & RegKind_FCC))  in isFCCAsmReg()
1667     return RegIdx.Index <= 7;  in isFCCAsmReg()
1671     return isRegIdx() && RegIdx.Kind & RegKind_ACC && RegIdx.Index <= 3;  in isACCAsmReg()
1675     return isRegIdx() && RegIdx.Kind & RegKind_COP0 && RegIdx.Index <= 31;  in isCOP0AsmReg()
1679     return isRegIdx() && RegIdx.Kind & RegKind_COP2 && RegIdx.Index <= 31;  in isCOP2AsmReg()
1683     return isRegIdx() && RegIdx.Kind & RegKind_COP3 && RegIdx.Index <= 31;  in isCOP3AsmReg()
1687     return isRegIdx() && RegIdx.Kind & RegKind_MSA128 && RegIdx.Index <= 31;  in isMSA128AsmReg()
1691     return isRegIdx() && RegIdx.Kind & RegKind_MSACtrl && RegIdx.Index <= 7;  in isMSACtrlAsmReg()
1714       OS << "RegIdx<" << RegIdx.Index << ":" << RegIdx.Kind << ", "  in print()
1715          << StringRef(RegIdx.Tok.Data, RegIdx.Tok.Length) << ">";  in print()
1738       StringRef Token(RegIdx.Tok.Data, RegIdx.Tok.Length);  in isValidForTie()
1739       StringRef OtherToken(Other.RegIdx.Tok.Data, Other.RegIdx.Tok.Length);  in isValidForTie()