Lines Matching refs:Reg1
193 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRR() argument
195 emitRX(Opcode, Reg0, MCOperand::createReg(Reg1), IDLoc, STI); in emitRR()
208 void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRX() argument
214 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRX()
220 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRR() argument
223 emitRRX(Opcode, Reg0, Reg1, MCOperand::createReg(Reg2), IDLoc, STI); in emitRRR()
226 void MipsTargetStreamer::emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRRX() argument
232 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRRX()
239 void MipsTargetStreamer::emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRI() argument
242 emitRRX(Opcode, Reg0, Reg1, MCOperand::createImm(Imm), IDLoc, STI); in emitRRI()
246 unsigned Reg1, int16_t Imm0, int16_t Imm1, in emitRRIII() argument
252 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRIII()