Lines Matching refs:RegMO
3927 MachineOperand *&RegMO) const { in isDefMIElgibleForForwarding()
3934 RegMO = &DefMI.getOperand(1); in isDefMIElgibleForForwarding()
3938 if (!RegMO->isReg()) in isDefMIElgibleForForwarding()
3948 const MachineOperand &RegMO, const MachineInstr &DefMI, in isRegElgibleForForwarding() argument
3961 Register Reg = RegMO.getReg(); in isRegElgibleForForwarding()
4324 MachineOperand *RegMO = nullptr; in transformToNewImmFormFedByAdd() local
4325 if (!isDefMIElgibleForForwarding(DefMI, III, ImmMO, RegMO)) in transformToNewImmFormFedByAdd()
4327 assert(ImmMO && RegMO && "Imm and Reg operand must have been set"); in transformToNewImmFormFedByAdd()
4348 MI.getOperand(III.OpNoForForwarding).setReg(RegMO->getReg()); in transformToNewImmFormFedByAdd()
4349 MI.getOperand(III.OpNoForForwarding).setIsKill(RegMO->isKill()); in transformToNewImmFormFedByAdd()
4367 if (RegMO->isKill() || IsKilledFor(RegMO->getReg())) in transformToNewImmFormFedByAdd()
4368 fixupIsDeadOrKill(&DefMI, &MI, RegMO->getReg()); in transformToNewImmFormFedByAdd()
4398 MachineOperand *RegMO = nullptr; in transformToImmFormFedByAdd() local
4399 if (!isDefMIElgibleForForwarding(DefMI, III, ImmMO, RegMO)) in transformToImmFormFedByAdd()
4401 assert(ImmMO && RegMO && "Imm and Reg operand must have been set"); in transformToImmFormFedByAdd()
4411 if (!isRegElgibleForForwarding(*RegMO, DefMI, MI, KillDefMI, in transformToImmFormFedByAdd()
4431 MI.getOperand(III.OpNoForForwarding).ChangeToRegister(RegMO->getReg(), in transformToImmFormFedByAdd()
4433 RegMO->isKill()); in transformToImmFormFedByAdd()
4480 if (IsFwdFeederRegKilled || RegMO->isKill()) in transformToImmFormFedByAdd()
4481 fixupIsDeadOrKill(&DefMI, &MI, RegMO->getReg()); in transformToImmFormFedByAdd()