Lines Matching refs:b000
414 : RVInstR<funct7, 0b000, OPC_SYSTEM, (outs), (ins GPR:$rs1, GPR:$rs2),
434 def JALR : RVInstI<0b000, OPC_JALR, (outs GPR:$rd),
440 def BEQ : BranchCC_rri<0b000, "beq">;
447 def LB : Load_ri<0b000, "lb">, Sched<[WriteLDB, ReadMemBase]>;
453 def SB : Store_rri<0b000, "sb">, Sched<[WriteSTB, ReadStoreData, ReadMemBase]>;
460 def ADDI : ALU_ri<0b000, "addi">;
476 def ADD : ALU_rr<0b0000000, 0b000, "add">, Sched<[WriteIALU, ReadIALU, ReadIALU]>;
477 def SUB : ALU_rr<0b0100000, 0b000, "sub">, Sched<[WriteIALU, ReadIALU, ReadIALU]>;
488 def FENCE : RVInstI<0b000, OPC_MISC_MEM, (outs),
499 def FENCE_TSO : RVInstI<0b000, OPC_MISC_MEM, (outs), (ins), "fence.tso", "">, Sched<[]> {
511 def ECALL : RVInstI<0b000, OPC_SYSTEM, (outs), (ins), "ecall", "">, Sched<[WriteJmp]> {
517 def EBREAK : RVInstI<0b000, OPC_SYSTEM, (outs), (ins), "ebreak", "">,
551 def ADDIW : RVInstI<0b000, OPC_OP_IMM_32, (outs GPR:$rd),
560 def ADDW : ALUW_rr<0b0000000, 0b000, "addw">,
562 def SUBW : ALUW_rr<0b0100000, 0b000, "subw">,
603 def SFENCE_VMA : RVInstR<0b0001001, 0b000, OPC_SYSTEM, (outs),