2326                                      uint64_t Mask, uint64_t CmpVal,  in getTestUnderMaskCond()  argument
2345   if (CmpVal == 0) {  in getTestUnderMaskCond()
2351   if (EffectivelyUnsigned && CmpVal > 0 && CmpVal <= Low) {  in getTestUnderMaskCond()
2357   if (EffectivelyUnsigned && CmpVal < Low) {  in getTestUnderMaskCond()
2365   if (CmpVal == Mask) {  in getTestUnderMaskCond()
2371   if (EffectivelyUnsigned && CmpVal >= Mask - Low && CmpVal < Mask) {  in getTestUnderMaskCond()
2377   if (EffectivelyUnsigned && CmpVal > Mask - Low && CmpVal <= Mask) {  in getTestUnderMaskCond()
2385   if (EffectivelyUnsigned && CmpVal >= Mask - High && CmpVal < High) {  in getTestUnderMaskCond()
2391   if (EffectivelyUnsigned && CmpVal > Mask - High && CmpVal <= High) {  in getTestUnderMaskCond()
2401     if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == Low)  in getTestUnderMaskCond()
2403     if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == Low)  in getTestUnderMaskCond()
2405     if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == High)  in getTestUnderMaskCond()
2407     if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == High)  in getTestUnderMaskCond()
2423   uint64_t CmpVal = ConstOp1->getZExtValue();  in adjustForTestUnderMask()  local
2448       if (CmpVal == uint64_t(-1))  in adjustForTestUnderMask()
2450       CmpVal += 1;  in adjustForTestUnderMask()
2455     MaskVal = -(CmpVal & -CmpVal);  in adjustForTestUnderMask()
2469       ((CmpVal >> ShiftVal) << ShiftVal) == CmpVal &&  in adjustForTestUnderMask()
2472                                         CmpVal >> ShiftVal,  in adjustForTestUnderMask()
2480              ((CmpVal << ShiftVal) >> ShiftVal) == CmpVal &&  in adjustForTestUnderMask()
2483                                                CmpVal << ShiftVal,  in adjustForTestUnderMask()
2488     NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, MaskVal, CmpVal,  in adjustForTestUnderMask()
3991   SDValue CmpVal = Node->getOperand(2);  in lowerATOMIC_CMP_SWAP()  local
4002     SDValue Ops[] = { ChainIn, Addr, CmpVal, SwapVal };  in lowerATOMIC_CMP_SWAP()
4036   SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift,  in lowerATOMIC_CMP_SWAP()
7590   Register CmpVal = MRI.createVirtualRegister(RC);  in emitAtomicCmpSwapW()  local
7632   BuildMI(MBB, DL, TII->get(SystemZ::PHI), CmpVal)  in emitAtomicCmpSwapW()
7641     .addReg(CmpVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0);  in emitAtomicCmpSwapW()