Lines Matching refs:IndexReg
166 unsigned IndexReg = Index.getReg(); in is16BitMemOperand() local
168 if (STI.hasFeature(X86::Mode16Bit) && BaseReg == 0 && IndexReg == 0) in is16BitMemOperand()
172 (IndexReg != 0 && in is16BitMemOperand()
173 X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg))) in is16BitMemOperand()
183 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in is32BitMemOperand() local
187 (IndexReg.getReg() != 0 && in is32BitMemOperand()
188 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg.getReg()))) in is32BitMemOperand()
191 assert(IndexReg.getReg() == 0 && "Invalid eip-based address."); in is32BitMemOperand()
194 if (IndexReg.getReg() == X86::EIZ) in is32BitMemOperand()
205 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in is64BitMemOperand() local
209 (IndexReg.getReg() != 0 && in is64BitMemOperand()
210 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg.getReg()))) in is64BitMemOperand()
387 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in emitMemModRMByte() local
395 assert(IndexReg.getReg() == 0 && !ForceSIB && in emitMemModRMByte()
483 if (IndexReg.getReg()) { in emitMemModRMByte()
484 unsigned IndexReg16 = R16Table[getX86RegNum(IndexReg)]; in emitMemModRMByte()
514 assert(IndexReg.getReg() == 0 && "Unexpected index register!"); in emitMemModRMByte()
536 !ForceSIB && IndexReg.getReg() == 0 && in emitMemModRMByte()
601 assert(IndexReg.getReg() != X86::ESP && IndexReg.getReg() != X86::RSP && in emitMemModRMByte()
638 unsigned IndexRegNo = IndexReg.getReg() ? getX86RegNum(IndexReg) : 4; in emitMemModRMByte()