Lines Matching refs:MBBI
63 MachineBasicBlock::iterator MBBI);
65 bool ExpandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
76 MachineBasicBlock *MBB, MachineBasicBlock::iterator MBBI) { in INITIALIZE_PASS()
78 MachineInstr *JTInst = &*MBBI; in INITIALIZE_PASS()
92 BuildMI(*MBB, MBBI, DL, TII->get(X86::LEA64r), X86::R11) in INITIALIZE_PASS()
99 BuildMI(*MBB, MBBI, DL, TII->get(X86::CMP64rr)) in INITIALIZE_PASS()
113 BuildMI(*MBB, MBBI, DL, TII->get(X86::JCC_1)).addMBB(ThenMBB).addImm(CC); in INITIALIZE_PASS()
118 MBBI = MBB->end(); in INITIALIZE_PASS()
128 BuildMI(*MBB, MBBI, DL, TII->get(X86::TAILJMPd64)) in INITIALIZE_PASS()
163 MBBI = MBB->end(); in INITIALIZE_PASS()
180 MachineBasicBlock::iterator MBBI) { in ExpandMI() argument
181 MachineInstr &MI = *MBBI; in ExpandMI()
183 DebugLoc DL = MBBI->getDebugLoc(); in ExpandMI()
196 MachineOperand &JumpTarget = MBBI->getOperand(0); in ExpandMI()
197 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? X86::AddrNumOperands in ExpandMI()
217 Offset += X86FL->mergeSPUpdates(MBB, MBBI, true); in ExpandMI()
218 X86FL->emitSPUpdate(MBB, MBBI, DL, Offset, /*InEpilogue=*/true); in ExpandMI()
245 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); in ExpandMI()
255 MIB.addImm(MBBI->getOperand(2).getImm()); in ExpandMI()
262 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); in ExpandMI()
264 MIB.add(MBBI->getOperand(i)); in ExpandMI()
267 BuildMI(MBB, MBBI, DL, in ExpandMI()
272 BuildMI(MBB, MBBI, DL, TII->get(X86::TAILJMPr)) in ExpandMI()
276 MachineInstr &NewMI = *std::prev(MBBI); in ExpandMI()
277 NewMI.copyImplicitOps(*MBBI->getParent()->getParent(), *MBBI); in ExpandMI()
280 if (MBBI->isCandidateForCallSiteEntry()) in ExpandMI()
281 MBB.getParent()->moveCallSiteInfo(&*MBBI, &NewMI); in ExpandMI()
284 MBB.erase(MBBI); in ExpandMI()
290 MachineOperand &DestAddr = MBBI->getOperand(0); in ExpandMI()
295 BuildMI(MBB, MBBI, DL, in ExpandMI()
303 int64_t StackAdj = MBBI->getOperand(0).getImm(); in ExpandMI()
304 X86FL->emitSPUpdate(MBB, MBBI, DL, StackAdj, true); in ExpandMI()
306 BuildMI(MBB, MBBI, DL, in ExpandMI()
308 MBB.erase(MBBI); in ExpandMI()
313 int64_t StackAdj = MBBI->getOperand(0).getImm(); in ExpandMI()
316 MIB = BuildMI(MBB, MBBI, DL, in ExpandMI()
319 MIB = BuildMI(MBB, MBBI, DL, in ExpandMI()
327 BuildMI(MBB, MBBI, DL, TII->get(X86::POP32r)).addReg(X86::ECX, RegState::Define); in ExpandMI()
328 X86FL->emitSPUpdate(MBB, MBBI, DL, StackAdj, /*InEpilogue=*/true); in ExpandMI()
329 BuildMI(MBB, MBBI, DL, TII->get(X86::PUSH32r)).addReg(X86::ECX); in ExpandMI()
330 MIB = BuildMI(MBB, MBBI, DL, TII->get(X86::RETL)); in ExpandMI()
332 for (unsigned I = 1, E = MBBI->getNumOperands(); I != E; ++I) in ExpandMI()
333 MIB.add(MBBI->getOperand(I)); in ExpandMI()
334 MBB.erase(MBBI); in ExpandMI()
344 const MachineOperand &InArg = MBBI->getOperand(6); in ExpandMI()
345 Register SaveRbx = MBBI->getOperand(7).getReg(); in ExpandMI()
351 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, InArg.getReg(), false); in ExpandMI()
353 MachineInstr *NewInstr = BuildMI(MBB, MBBI, DL, TII->get(X86::LCMPXCHG16B)); in ExpandMI()
356 NewInstr->addOperand(MBBI->getOperand(Idx)); in ExpandMI()
358 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx, in ExpandMI()
362 MBBI->eraseFromParent(); in ExpandMI()
374 int64_t Disp = MBBI->getOperand(1 + X86::AddrDisp).getImm(); in ExpandMI()
376 Register Reg = MBBI->getOperand(0).getReg(); in ExpandMI()
377 bool DstIsDead = MBBI->getOperand(0).isDead(); in ExpandMI()
381 auto MIBLo = BuildMI(MBB, MBBI, DL, TII->get(X86::KMOVWkm)) in ExpandMI()
383 auto MIBHi = BuildMI(MBB, MBBI, DL, TII->get(X86::KMOVWkm)) in ExpandMI()
387 MIBLo.add(MBBI->getOperand(1 + i)); in ExpandMI()
391 MIBHi.add(MBBI->getOperand(1 + i)); in ExpandMI()
395 MachineMemOperand *OldMMO = MBBI->memoperands().front(); in ExpandMI()
404 MBB.erase(MBBI); in ExpandMI()
408 int64_t Disp = MBBI->getOperand(X86::AddrDisp).getImm(); in ExpandMI()
410 Register Reg = MBBI->getOperand(X86::AddrNumOperands).getReg(); in ExpandMI()
411 bool SrcIsKill = MBBI->getOperand(X86::AddrNumOperands).isKill(); in ExpandMI()
415 auto MIBLo = BuildMI(MBB, MBBI, DL, TII->get(X86::KMOVWmk)); in ExpandMI()
416 auto MIBHi = BuildMI(MBB, MBBI, DL, TII->get(X86::KMOVWmk)); in ExpandMI()
419 MIBLo.add(MBBI->getOperand(i)); in ExpandMI()
423 MIBHi.add(MBBI->getOperand(i)); in ExpandMI()
429 MachineMemOperand *OldMMO = MBBI->memoperands().front(); in ExpandMI()
438 MBB.erase(MBBI); in ExpandMI()
448 const MachineOperand &InArg = MBBI->getOperand(1); in ExpandMI()
451 TII->copyPhysReg(MBB, MBBI, DL, X86::EBX, InArg.getReg(), InArg.isKill()); in ExpandMI()
453 BuildMI(MBB, MBBI, DL, TII->get(X86::MWAITXrrr)); in ExpandMI()
455 Register SaveRbx = MBBI->getOperand(2).getReg(); in ExpandMI()
456 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx, /*SrcIsKill*/ true); in ExpandMI()
458 MBBI->eraseFromParent(); in ExpandMI()
462 ExpandICallBranchFunnel(&MBB, MBBI); in ExpandMI()
474 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); in ExpandMBB() local
475 while (MBBI != E) { in ExpandMBB()
476 MachineBasicBlock::iterator NMBBI = std::next(MBBI); in ExpandMBB()
477 Modified |= ExpandMI(MBB, MBBI); in ExpandMBB()
478 MBBI = NMBBI; in ExpandMBB()