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Lines Matching refs:DestReg

383   Register DestReg = MI.getOperand(0).getReg();  in optTwoAddrLEA()  local
388 if (UseLEAForSP && (DestReg == X86::ESP || DestReg == X86::RSP)) in optTwoAddrLEA()
404 (DestReg == BaseReg || DestReg == IndexReg)) { in optTwoAddrLEA()
406 if (DestReg != BaseReg) in optTwoAddrLEA()
411 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg) in optTwoAddrLEA()
416 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg) in optTwoAddrLEA()
419 } else if (DestReg == BaseReg && IndexReg == 0) { in optTwoAddrLEA()
432 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg) in optTwoAddrLEA()
435 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg) in optTwoAddrLEA()
442 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg) in optTwoAddrLEA()
446 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg) in optTwoAddrLEA()
568 Register DestReg = Dest.getReg(); in processInstrForSlow3OpLEA() local
585 if (IsInefficientBase && DestReg == BaseReg && !IsScale1) in processInstrForSlow3OpLEA()
597 if (IsScale1 && (DestReg == BaseReg || DestReg == IndexReg)) { in processInstrForSlow3OpLEA()
599 if (DestReg != BaseReg) in processInstrForSlow3OpLEA()
604 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpc), DestReg) in processInstrForSlow3OpLEA()
610 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpc), DestReg) in processInstrForSlow3OpLEA()
638 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpc), DestReg) in processInstrForSlow3OpLEA()
639 .addReg(DestReg); in processInstrForSlow3OpLEA()
643 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpc), DestReg) in processInstrForSlow3OpLEA()
644 .addReg(DestReg) in processInstrForSlow3OpLEA()
657 assert(DestReg != BaseReg && "DestReg == BaseReg should be handled already!"); in processInstrForSlow3OpLEA()
667 TII->copyPhysReg(MBB, MI, MI.getDebugLoc(), DestReg, BaseReg, BIK); in processInstrForSlow3OpLEA()
671 NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(NewOpc), DestReg) in processInstrForSlow3OpLEA()
672 .addReg(DestReg) in processInstrForSlow3OpLEA()
694 NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(NewOpc), DestReg) in processInstrForSlow3OpLEA()
695 .addReg(DestReg) in processInstrForSlow3OpLEA()