Lines Matching refs:useAVX512Regs
1050 if (!Subtarget.useAVX512Regs() && in X86TargetLowering()
1476 if (!Subtarget.useSoftFloat() && Subtarget.useAVX512Regs()) { in X86TargetLowering()
2102 if (Subtarget.useAVX512Regs()) in handleMaskRegisterForCallingConv()
2167 if (VT == MVT::v64i1 && Subtarget.hasBWI() && !Subtarget.useAVX512Regs() && in getVectorTypeBreakdownForCallingConv()
3522 if (Subtarget.useAVX512Regs() && in forwardMustTailParameters()
6040 (!CheckBWI && Subtarget.useAVX512Regs())) { in SplitOpsAndApply()
21058 assert(Subtarget.useAVX512Regs() && "Unexpected features!"); in LowerFP_TO_INT()
21091 assert(Subtarget.useAVX512Regs() && "Requires avx512f"); in LowerFP_TO_INT()
21099 assert(Subtarget.useAVX512Regs() && !Subtarget.hasVLX() && in LowerFP_TO_INT()
21131 assert(Subtarget.useAVX512Regs() && Subtarget.hasDQI() && in LowerFP_TO_INT()
22187 (VT == MVT::v16f32 && Subtarget.useAVX512Regs())) { in getSqrtEstimate()
22216 (VT == MVT::v16f32 && Subtarget.useAVX512Regs())) { in getRecipEstimate()
35478 ((RootVT.is256BitVector() && Subtarget.useAVX512Regs()) || in combineX86ShuffleChain()
44232 if (Subtarget.hasBWI() && !Subtarget.useAVX512Regs() && in combineTruncateWithSat()
44253 !(!Subtarget.useAVX512Regs() && VT.getSizeInBits() >= 256); in combineTruncateWithSat()
45542 !(!Subtarget.useAVX512Regs() && VT.is256BitVector() && in combineVectorSignBitsTruncation()
46858 if (Size > 256 && Subtarget.useAVX512Regs()) in combineExtSetcc()
47173 (OpSize == 512 && Subtarget.useAVX512Regs())) { in combineVectorSizedSetCCEquality()
48852 (VT.is512BitVector() && Subtarget.useAVX512Regs() && in combineConcatVectorOps()
48868 if (VT.is512BitVector() && Subtarget.useAVX512Regs() && in combineConcatVectorOps()