Lines Matching refs:Pseudo
24 // Random Pseudo Instructions.
31 def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins i32imm:$label),
40 def ADJCALLSTACKDOWN32 : I<0, Pseudo, (outs),
43 def ADJCALLSTACKUP32 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
58 def ADJCALLSTACKDOWN64 : I<0, Pseudo, (outs),
61 def ADJCALLSTACKUP64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
73 def VASTART_SAVE_XMM_REGS : I<0, Pseudo,
87 def VAARG_64 : I<0, Pseudo,
102 def SEG_ALLOCA_32 : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$size),
109 def SEG_ALLOCA_64 : I<0, Pseudo, (outs GR64:$dst), (ins GR64:$size),
119 def PROBED_ALLOCA_32 : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$size),
126 def PROBED_ALLOCA_64 : I<0, Pseudo, (outs GR64:$dst), (ins GR64:$size),
134 def STACKALLOC_W_PROBING : I<0, Pseudo, (outs), (ins i64imm:$stacksize),
147 def WIN_ALLOCA_32 : I<0, Pseudo, (outs), (ins GR32:$size),
153 def WIN_ALLOCA_64 : I<0, Pseudo, (outs), (ins GR64:$size),
163 def XOR32_FP : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src),
166 def XOR64_FP : I<0, Pseudo, (outs GR64:$dst), (ins GR64:$src),
172 // EH Pseudo Instructions
193 def CLEANUPRET : I<0, Pseudo, (outs), (ins), "# CLEANUPRET", [(cleanupret)]>;
197 def CATCHRET : I<0, Pseudo, (outs), (ins brtarget32:$dst, brtarget32:$from),
204 def EH_SjLj_SetJmp32 : I<0, Pseudo, (outs GR32:$dst), (ins i32mem:$buf),
208 def EH_SjLj_SetJmp64 : I<0, Pseudo, (outs GR32:$dst), (ins i64mem:$buf),
213 def EH_SjLj_LongJmp32 : I<0, Pseudo, (outs), (ins i32mem:$buf),
217 def EH_SjLj_LongJmp64 : I<0, Pseudo, (outs), (ins i64mem:$buf),
225 def EH_SjLj_Setup : I<0, Pseudo, (outs), (ins brtarget:$dst),
231 // Pseudo instructions used by unwind info.
234 def SEH_PushReg : I<0, Pseudo, (outs), (ins i32imm:$reg),
236 def SEH_SaveReg : I<0, Pseudo, (outs), (ins i32imm:$reg, i32imm:$dst),
238 def SEH_SaveXMM : I<0, Pseudo, (outs), (ins i32imm:$reg, i32imm:$dst),
240 def SEH_StackAlloc : I<0, Pseudo, (outs), (ins i32imm:$size),
242 def SEH_StackAlign : I<0, Pseudo, (outs), (ins i32imm:$align),
244 def SEH_SetFrame : I<0, Pseudo, (outs), (ins i32imm:$reg, i32imm:$offset),
246 def SEH_PushFrame : I<0, Pseudo, (outs), (ins i1imm:$mode),
248 def SEH_EndPrologue : I<0, Pseudo, (outs), (ins),
250 def SEH_Epilogue : I<0, Pseudo, (outs), (ins),
255 // Pseudo instructions used by segmented stacks.
262 def MORESTACK_RET: I<0, Pseudo, (outs), (ins), "", []>;
267 def MORESTACK_RET_RESTORE_R10 : I<0, Pseudo, (outs), (ins), "", []>;
278 def MOV32r0 : I<0, Pseudo, (outs GR32:$dst), (ins), "",
292 // Pseudo instructions for materializing 1 and -1 using XOR+INC/DEC,
295 def MOV32r1 : I<0, Pseudo, (outs GR32:$dst), (ins), "",
297 def MOV32r_1 : I<0, Pseudo, (outs GR32:$dst), (ins), "",
310 def MOV32ImmSExti8 : I<0, Pseudo, (outs GR32:$dst), (ins i32i8imm:$src), "",
313 def MOV64ImmSExti8 : I<0, Pseudo, (outs GR64:$dst), (ins i64i8imm:$src), "",
323 def MOV32ri64 : I<0, Pseudo, (outs GR64:$dst), (ins i64i32imm:$src), "",
337 def SETB_C32r : I<0, Pseudo, (outs GR32:$dst), (ins), "", []>;
338 def SETB_C64r : I<0, Pseudo, (outs GR64:$dst), (ins), "", []>;
342 // String Pseudo Instructions
447 def TLS_addr32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
451 def TLS_base_addr32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
467 def TLS_addr64 : I<0, Pseudo, (outs), (ins i64mem:$sym),
471 def TLS_base_addr64 : I<0, Pseudo, (outs), (ins i64mem:$sym),
475 def TLS_addrX32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
479 def TLS_base_addrX32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
492 def TLSCall_32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
505 def TLSCall_64 : I<0, Pseudo, (outs), (ins i64mem:$sym),
512 // Conditional Move Pseudo Instructions
517 def CMOV#NAME : I<0, Pseudo,
637 // Normal-Instructions-With-Lock-Prefix Pseudo Instructions
651 def Int_MemBarrier : I<0, Pseudo, (outs), (ins),
883 I<0, Pseudo, (outs GR64:$dst),
887 // Pseudo instruction that doesn't read/write RBX. Will be turned into either
895 I<0, Pseudo, (outs), (ins i128mem:$ptr, GR64:$rbx_input), "",
906 I<0, Pseudo, (outs GR64:$dst),
912 // Pseudo mwaitx instruction to use for custom insertion.
917 I<0, Pseudo, (outs), (ins GR32:$ecx, GR32:$eax, GR32:$ebx),
1386 def ADD8rr_DB : I<0, Pseudo, (outs GR8:$dst), (ins GR8:$src1, GR8:$src2),
1389 def ADD16rr_DB : I<0, Pseudo, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
1392 def ADD32rr_DB : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
1395 def ADD64rr_DB : I<0, Pseudo, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
1403 def ADD8ri_DB : I<0, Pseudo,
1407 def ADD16ri8_DB : I<0, Pseudo,
1411 def ADD16ri_DB : I<0, Pseudo, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2),
1415 def ADD32ri8_DB : I<0, Pseudo,
1419 def ADD32ri_DB : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2),
1424 def ADD64ri8_DB : I<0, Pseudo,
1429 def ADD64ri32_DB : I<0, Pseudo,