197   hardenLoadAddr(MachineInstr &MI, MachineOperand &BaseMO,
1337         MachineOperand &BaseMO =  in tracePredStateThroughBlocksAndHarden()  local
1345         if (!BaseMO.isFI() && BaseMO.getReg() != X86::RIP &&  in tracePredStateThroughBlocksAndHarden()
1346             BaseMO.getReg() != X86::NoRegister)  in tracePredStateThroughBlocksAndHarden()
1347           BaseReg = BaseMO.getReg();  in tracePredStateThroughBlocksAndHarden()
1411           MachineOperand &BaseMO =  in tracePredStateThroughBlocksAndHarden()  local
1415           hardenLoadAddr(MI, BaseMO, IndexMO, AddrRegToHardenedReg);  in tracePredStateThroughBlocksAndHarden()
1574     MachineInstr &MI, MachineOperand &BaseMO, MachineOperand &IndexMO,  in hardenLoadAddr()  argument
1585   if (BaseMO.isFI()) {  in hardenLoadAddr()
1591   } else if (BaseMO.getReg() == X86::RSP) {  in hardenLoadAddr()
1599   } else if (BaseMO.getReg() == X86::RIP ||  in hardenLoadAddr()
1600              BaseMO.getReg() == X86::NoRegister) {  in hardenLoadAddr()
1611                << (BaseMO.getReg() == X86::RIP ? "RIP-relative" : "no-base")  in hardenLoadAddr()
1614     assert(BaseMO.isReg() &&  in hardenLoadAddr()
1616     HardenOpRegs.push_back(&BaseMO);  in hardenLoadAddr()
1813         MachineOperand &BaseMO =  in sinkPostLoadHardenedInst()  local
1817         if ((BaseMO.isReg() && BaseMO.getReg() == DefReg) ||  in sinkPostLoadHardenedInst()