Lines Matching refs:OpRC
1662 auto *OpRC = MRI->getRegClass(OpReg); in hardenLoadAddr() local
1663 Register TmpReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr()
1667 if (!Subtarget->hasVLX() && (OpRC->hasSuperClassEq(&X86::VR128RegClass) || in hardenLoadAddr()
1668 OpRC->hasSuperClassEq(&X86::VR256RegClass))) { in hardenLoadAddr()
1670 bool Is128Bit = OpRC->hasSuperClassEq(&X86::VR128RegClass); in hardenLoadAddr()
1684 Register VBStateReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr()
1704 } else if (OpRC->hasSuperClassEq(&X86::VR128XRegClass) || in hardenLoadAddr()
1705 OpRC->hasSuperClassEq(&X86::VR256XRegClass) || in hardenLoadAddr()
1706 OpRC->hasSuperClassEq(&X86::VR512RegClass)) { in hardenLoadAddr()
1708 bool Is128Bit = OpRC->hasSuperClassEq(&X86::VR128XRegClass); in hardenLoadAddr()
1709 bool Is256Bit = OpRC->hasSuperClassEq(&X86::VR256XRegClass); in hardenLoadAddr()
1714 Register VStateReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr()
1737 assert(OpRC->hasSuperClassEq(&X86::GR64RegClass) && in hardenLoadAddr()