2331     { ISD::SMIN,       MVT::v32i16,  1 },  in getTypeBasedIntrinsicInstrCost()
2332     { ISD::SMIN,       MVT::v64i8,   1 },  in getTypeBasedIntrinsicInstrCost()
2373     { ISD::SMIN,       MVT::v8i64,   1 },  in getTypeBasedIntrinsicInstrCost()
2374     { ISD::SMIN,       MVT::v16i32,  1 },  in getTypeBasedIntrinsicInstrCost()
2375     { ISD::SMIN,       MVT::v32i16,  2 }, // FIXME: include split  in getTypeBasedIntrinsicInstrCost()
2376     { ISD::SMIN,       MVT::v64i8,   2 }, // FIXME: include split  in getTypeBasedIntrinsicInstrCost()
2377     { ISD::SMIN,       MVT::v4i64,   1 },  in getTypeBasedIntrinsicInstrCost()
2378     { ISD::SMIN,       MVT::v2i64,   1 },  in getTypeBasedIntrinsicInstrCost()
2459     { ISD::SMIN,       MVT::v8i32,   1 },  in getTypeBasedIntrinsicInstrCost()
2460     { ISD::SMIN,       MVT::v16i16,  1 },  in getTypeBasedIntrinsicInstrCost()
2461     { ISD::SMIN,       MVT::v32i8,   1 },  in getTypeBasedIntrinsicInstrCost()
2514     { ISD::SMIN,       MVT::v8i32,   4 }, // 2 x 128-bit Op + extract/insert  in getTypeBasedIntrinsicInstrCost()
2515     { ISD::SMIN,       MVT::v16i16,  4 }, // 2 x 128-bit Op + extract/insert  in getTypeBasedIntrinsicInstrCost()
2516     { ISD::SMIN,       MVT::v32i8,   4 }, // 2 x 128-bit Op + extract/insert  in getTypeBasedIntrinsicInstrCost()
2566     { ISD::SMIN,       MVT::v4i32,   1 },  in getTypeBasedIntrinsicInstrCost()
2567     { ISD::SMIN,       MVT::v16i8,   1 },  in getTypeBasedIntrinsicInstrCost()
2624     { ISD::SMIN,       MVT::v8i16,   1 },  in getTypeBasedIntrinsicInstrCost()
2743     ISD = ISD::SMIN;  in getTypeBasedIntrinsicInstrCost()
3583     ISD = IsUnsigned ? ISD::UMIN : ISD::SMIN;  in getMinMaxCost()
3596     {ISD::SMIN,    MVT::v8i16, 1},  in getMinMaxCost()
3601     {ISD::SMIN,    MVT::v4i32, 1},  in getMinMaxCost()
3604     {ISD::SMIN,    MVT::v16i8, 1},  in getMinMaxCost()
3614     {ISD::SMIN,    MVT::v8i32,  3},  in getMinMaxCost()
3616     {ISD::SMIN,    MVT::v16i16, 3},  in getMinMaxCost()
3618     {ISD::SMIN,    MVT::v32i8,  3},  in getMinMaxCost()
3623     {ISD::SMIN,    MVT::v8i32,  1},  in getMinMaxCost()
3625     {ISD::SMIN,    MVT::v16i16, 1},  in getMinMaxCost()
3627     {ISD::SMIN,    MVT::v32i8,  1},  in getMinMaxCost()
3634     {ISD::SMIN,    MVT::v2i64,  1},  in getMinMaxCost()
3636     {ISD::SMIN,    MVT::v4i64,  1},  in getMinMaxCost()
3638     {ISD::SMIN,    MVT::v8i64,  1},  in getMinMaxCost()
3640     {ISD::SMIN,    MVT::v16i32, 1},  in getMinMaxCost()
3645     {ISD::SMIN,    MVT::v32i16, 1},  in getMinMaxCost()
3647     {ISD::SMIN,    MVT::v64i8,  1},  in getMinMaxCost()
3715     ISD = IsUnsigned ? ISD::UMIN : ISD::SMIN;  in getMinMaxReductionCost()
3732       {ISD::SMIN, MVT::v2i16, 3}, // same as sse2  in getMinMaxReductionCost()
3733       {ISD::SMIN, MVT::v4i16, 5}, // same as sse2  in getMinMaxReductionCost()
3736       {ISD::SMIN, MVT::v8i16, 4}, // phminposuw+xor  in getMinMaxReductionCost()
3738       {ISD::SMIN, MVT::v2i8,  3}, // pminsb  in getMinMaxReductionCost()
3739       {ISD::SMIN, MVT::v4i8,  5}, // pminsb  in getMinMaxReductionCost()
3740       {ISD::SMIN, MVT::v8i8,  7}, // pminsb  in getMinMaxReductionCost()
3741       {ISD::SMIN, MVT::v16i8, 6},  in getMinMaxReductionCost()
3749       {ISD::SMIN, MVT::v16i16, 6},  in getMinMaxReductionCost()
3751       {ISD::SMIN, MVT::v32i8, 8},  in getMinMaxReductionCost()
3756       {ISD::SMIN, MVT::v32i16, 8},  in getMinMaxReductionCost()
3758       {ISD::SMIN, MVT::v64i8, 10},  in getMinMaxReductionCost()