254   if ((ISD == ISD::SDIV || ISD == ISD::SREM || ISD == ISD::UDIV ||  in getArithmeticInstrCost()
259     if (ISD == ISD::SDIV || ISD == ISD::SREM) {  in getArithmeticInstrCost()
278       if (ISD == ISD::SREM) {  in getArithmeticInstrCost()
326     { ISD::SREM, MVT::v16i32,  8 }, // pmuludq+mul+sub sequence  in getArithmeticInstrCost()
346     { ISD::SREM, MVT::v8i32,   8 }, // pmuludq+mul+sub sequence  in getArithmeticInstrCost()
368     { ISD::SREM, MVT::v8i32,  16+2 }, // 2*pmuludq+mul+sub sequence + split.  in getArithmeticInstrCost()
370     { ISD::SREM, MVT::v4i32,     8 }, // pmuludq+mul+sub sequence  in getArithmeticInstrCost()
387     { ISD::SREM, MVT::v64i8,  16 }, // 2*ext+2*pmulhw+mul+sub sequence  in getArithmeticInstrCost()
391     { ISD::SREM, MVT::v32i16,  8 }, // vpmulhw+mul+sub sequence  in getArithmeticInstrCost()
406     { ISD::SREM, MVT::v16i32, 17 }, // vpmuldq+mul+sub sequence  in getArithmeticInstrCost()
410     { ISD::SREM, MVT::v64i8,  32 }, // 4*ext+4*pmulhw+mul+sub sequence  in getArithmeticInstrCost()
414     { ISD::SREM, MVT::v32i16, 16 }, // 2*vpmulhw+mul+sub sequence  in getArithmeticInstrCost()
429     { ISD::SREM, MVT::v32i8,  16 }, // 2*ext+2*pmulhw+mul+sub sequence  in getArithmeticInstrCost()
433     { ISD::SREM, MVT::v16i16,  8 }, // vpmulhw+mul+sub sequence  in getArithmeticInstrCost()
437     { ISD::SREM, MVT::v8i32,  19 }, // vpmuldq+mul+sub sequence  in getArithmeticInstrCost()
451     { ISD::SREM, MVT::v32i8,  32+2 }, // 4*ext+4*pmulhw+mul+sub sequence + split.  in getArithmeticInstrCost()
453     { ISD::SREM, MVT::v16i8,    16 }, // 2*ext+2*pmulhw+mul+sub sequence  in getArithmeticInstrCost()
459     { ISD::SREM, MVT::v16i16, 16+2 }, // 2*pmulhw+mul+sub sequence + split.  in getArithmeticInstrCost()
461     { ISD::SREM, MVT::v8i16,     8 }, // pmulhw+mul+sub sequence  in getArithmeticInstrCost()
467     { ISD::SREM, MVT::v8i32,  48+2 }, // 2*pmuludq+mul+sub sequence + split.  in getArithmeticInstrCost()
469     { ISD::SREM, MVT::v4i32,    24 }, // pmuludq+mul+sub sequence  in getArithmeticInstrCost()
482     if (ISD == ISD::SREM && LT.second == MVT::v8i32 && ST->hasAVX())  in getArithmeticInstrCost()
486     if (ISD == ISD::SREM && LT.second == MVT::v4i32 && ST->hasSSE41())  in getArithmeticInstrCost()
950   if (LT.second.isVector() && (ISD == ISD::SDIV || ISD == ISD::SREM ||  in getArithmeticInstrCost()