Lines Matching refs:v16i16
432 { ISD::SDIV, MVT::v16i16, 6 }, // vpmulhw sequence in getArithmeticInstrCost()
433 { ISD::SREM, MVT::v16i16, 8 }, // vpmulhw+mul+sub sequence in getArithmeticInstrCost()
434 { ISD::UDIV, MVT::v16i16, 6 }, // vpmulhuw sequence in getArithmeticInstrCost()
435 { ISD::UREM, MVT::v16i16, 8 }, // vpmulhuw+mul+sub sequence in getArithmeticInstrCost()
458 { ISD::SDIV, MVT::v16i16, 12+2 }, // 2*pmulhw sequence + split. in getArithmeticInstrCost()
459 { ISD::SREM, MVT::v16i16, 16+2 }, // 2*pmulhw+mul+sub sequence + split. in getArithmeticInstrCost()
462 { ISD::UDIV, MVT::v16i16, 12+2 }, // 2*pmulhuw sequence + split. in getArithmeticInstrCost()
463 { ISD::UREM, MVT::v16i16, 16+2 }, // 2*pmulhuw+mul+sub sequence + split. in getArithmeticInstrCost()
498 { ISD::SHL, MVT::v16i16, 1 }, // vpsllvw in getArithmeticInstrCost()
499 { ISD::SRL, MVT::v16i16, 1 }, // vpsrlvw in getArithmeticInstrCost()
500 { ISD::SRA, MVT::v16i16, 1 }, // vpsravw in getArithmeticInstrCost()
513 { ISD::SHL, MVT::v16i16, 1 }, // psllw. in getArithmeticInstrCost()
514 { ISD::SRL, MVT::v16i16, 1 }, // psrlw. in getArithmeticInstrCost()
515 { ISD::SRA, MVT::v16i16, 1 }, // psraw. in getArithmeticInstrCost()
639 if (ISD == ISD::SHL && LT.second == MVT::v16i16 && in getArithmeticInstrCost()
671 { ISD::SHL, MVT::v16i16, 2+2 }, in getArithmeticInstrCost()
672 { ISD::SRL, MVT::v16i16, 4+2 }, in getArithmeticInstrCost()
673 { ISD::SRA, MVT::v16i16, 4+2 }, in getArithmeticInstrCost()
698 { ISD::SHL, MVT::v16i16, 2+2 }, // 2*psllw + split. in getArithmeticInstrCost()
702 { ISD::SRL, MVT::v16i16, 2+2 }, // 2*psrlw + split. in getArithmeticInstrCost()
706 { ISD::SRA, MVT::v16i16, 2+2 }, // 2*psraw + split. in getArithmeticInstrCost()
731 ((VT == MVT::v16i16 || VT == MVT::v8i32) && ST->hasAVX())) in getArithmeticInstrCost()
738 { ISD::SHL, MVT::v16i16, 10 }, // extend/vpsrlvd/pack sequence. in getArithmeticInstrCost()
743 { ISD::SRL, MVT::v16i16, 10 }, // extend/vpsrlvd/pack sequence. in getArithmeticInstrCost()
748 { ISD::SRA, MVT::v16i16, 10 }, // extend/vpsravd/pack sequence. in getArithmeticInstrCost()
755 { ISD::SUB, MVT::v16i16, 1 }, // psubw in getArithmeticInstrCost()
756 { ISD::ADD, MVT::v16i16, 1 }, // paddw in getArithmeticInstrCost()
764 { ISD::MUL, MVT::v16i16, 1 }, // pmullw in getArithmeticInstrCost()
792 { ISD::MUL, MVT::v16i16, 4 }, in getArithmeticInstrCost()
796 { ISD::SUB, MVT::v16i16, 4 }, in getArithmeticInstrCost()
797 { ISD::ADD, MVT::v16i16, 4 }, in getArithmeticInstrCost()
854 { ISD::SHL, MVT::v16i16, 2*14+2 }, // pblendvb sequence + split. in getArithmeticInstrCost()
861 { ISD::SRL, MVT::v16i16, 2*14+2 }, // pblendvb sequence + split. in getArithmeticInstrCost()
868 { ISD::SRA, MVT::v16i16, 2*14+2 }, // pblendvb sequence + split. in getArithmeticInstrCost()
1120 {TTI::SK_Reverse, MVT::v16i16, 2}, // vpermw in getShuffleCost()
1124 {TTI::SK_PermuteSingleSrc, MVT::v16i16, 2}, // vpermw in getShuffleCost()
1128 {TTI::SK_PermuteTwoSrc, MVT::v16i16, 2}, // vpermt2w in getShuffleCost()
1205 {TTI::SK_Broadcast, MVT::v16i16, 1}, // vpbroadcastw in getShuffleCost()
1212 {TTI::SK_Reverse, MVT::v16i16, 2}, // vperm2i128 + pshufb in getShuffleCost()
1215 {TTI::SK_Select, MVT::v16i16, 1}, // vpblendvb in getShuffleCost()
1222 {TTI::SK_PermuteSingleSrc, MVT::v16i16, 4}, // vperm2i128 + 2*vpshufb in getShuffleCost()
1231 {TTI::SK_PermuteTwoSrc, MVT::v16i16, 7}, // 2*vperm2i128 + 4*vpshufb in getShuffleCost()
1246 {TTI::SK_PermuteSingleSrc, MVT::v16i16, 4}, // vextractf128 + 2*vpperm in getShuffleCost()
1251 {TTI::SK_PermuteTwoSrc, MVT::v16i16, 9}, // 2*vextractf128 + 6*vpperm in getShuffleCost()
1268 {TTI::SK_Broadcast, MVT::v16i16, 3}, // vpshuflw + vpshufd + vinsertf128 in getShuffleCost()
1275 {TTI::SK_Reverse, MVT::v16i16, 4}, // vextractf128 + 2*pshufb in getShuffleCost()
1284 {TTI::SK_Select, MVT::v16i16, 3}, // vpand + vpandn + vpor in getShuffleCost()
1291 {TTI::SK_PermuteSingleSrc, MVT::v16i16, 8}, // vextractf128 + 4*pshufb in getShuffleCost()
1300 {TTI::SK_PermuteTwoSrc, MVT::v16i16, 15}, // 2*vextractf128 + 8*pshufb in getShuffleCost()
1427 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i1, 1 }, in getCastInstrCost()
1440 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i1, 2 }, in getCastInstrCost()
1446 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i16, 2 }, // widen to zmm in getCastInstrCost()
1454 { ISD::TRUNCATE, MVT::v16i1, MVT::v16i16, 2 }, // widen to zmm in getCastInstrCost()
1489 { ISD::TRUNCATE, MVT::v16i1, MVT::v16i16, 3 }, // sext+vpslld+vptestmd in getCastInstrCost()
1498 { ISD::TRUNCATE, MVT::v16i16, MVT::v16i32, 2 }, in getCastInstrCost()
1505 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i16, 3 }, // extend to v16i32 in getCastInstrCost()
1527 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i1, 3 }, in getCastInstrCost()
1528 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i1, 4 }, in getCastInstrCost()
1548 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i16, 1 }, in getCastInstrCost()
1549 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i16, 1 }, in getCastInstrCost()
1565 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i16, 2 }, in getCastInstrCost()
1574 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 2 }, in getCastInstrCost()
1583 { ISD::FP_TO_SINT, MVT::v16i16, MVT::v16f32, 3 }, in getCastInstrCost()
1589 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 3 }, in getCastInstrCost()
1602 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i1, 1 }, in getCastInstrCost()
1613 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i1, 2 }, in getCastInstrCost()
1616 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i16, 2 }, in getCastInstrCost()
1624 { ISD::TRUNCATE, MVT::v16i1, MVT::v16i16, 2 }, // vpsllw+vptestmw in getCastInstrCost()
1658 { ISD::TRUNCATE, MVT::v16i1, MVT::v16i16, 8 }, // split+2*v8i16 in getCastInstrCost()
1685 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i1, 10 }, in getCastInstrCost()
1686 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i1, 12 }, in getCastInstrCost()
1739 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i1, 1 }, in getCastInstrCost()
1740 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i1, 1 }, in getCastInstrCost()
1741 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 1 }, in getCastInstrCost()
1742 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 1 }, in getCastInstrCost()
1749 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i16, 3 }, in getCastInstrCost()
1750 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i16, 3 }, in getCastInstrCost()
1775 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i1, 4 }, in getCastInstrCost()
1776 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i1, 4 }, in getCastInstrCost()
1777 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 4 }, in getCastInstrCost()
1778 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 4 }, in getCastInstrCost()
1788 { ISD::TRUNCATE, MVT::v16i1, MVT::v16i16, 4 }, in getCastInstrCost()
1792 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i16, 4 }, in getCastInstrCost()
1876 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 2 }, in getCastInstrCost()
1877 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 2 }, in getCastInstrCost()
1884 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i16, 4 }, in getCastInstrCost()
1885 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i16, 4 }, in getCastInstrCost()
1899 { ISD::TRUNCATE, MVT::v16i16, MVT::v16i32, 6 }, in getCastInstrCost()
1967 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 3 }, in getCastInstrCost()
1968 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 4 }, in getCastInstrCost()
1977 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i16, 6 }, in getCastInstrCost()
1978 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i16, 8 }, in getCastInstrCost()
1993 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i16, 3 }, in getCastInstrCost()
2001 { ISD::TRUNCATE, MVT::v16i16, MVT::v16i32, 10 }, in getCastInstrCost()
2178 { ISD::SETCC, MVT::v16i16, 1 }, in getCmpSelInstrCost()
2183 { ISD::SELECT, MVT::v16i16, 1 }, // pblendvb in getCmpSelInstrCost()
2193 { ISD::SETCC, MVT::v16i16, 4 }, in getCmpSelInstrCost()
2200 { ISD::SELECT, MVT::v16i16, 3 }, // vandps + vandnps + vorps in getCmpSelInstrCost()
2301 { ISD::CTLZ, MVT::v16i16, 4 }, in getTypeBasedIntrinsicInstrCost()
2419 { ISD::BITREVERSE, MVT::v16i16, 4 }, in getTypeBasedIntrinsicInstrCost()
2433 { ISD::ABS, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2437 { ISD::BITREVERSE, MVT::v16i16, 5 }, in getTypeBasedIntrinsicInstrCost()
2441 { ISD::BSWAP, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2444 { ISD::CTLZ, MVT::v16i16, 14 }, in getTypeBasedIntrinsicInstrCost()
2448 { ISD::CTPOP, MVT::v16i16, 9 }, in getTypeBasedIntrinsicInstrCost()
2452 { ISD::CTTZ, MVT::v16i16, 12 }, in getTypeBasedIntrinsicInstrCost()
2454 { ISD::SADDSAT, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2457 { ISD::SMAX, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2460 { ISD::SMIN, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2462 { ISD::SSUBSAT, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2464 { ISD::UADDSAT, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2468 { ISD::UMAX, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2471 { ISD::UMIN, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2473 { ISD::USUBSAT, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2488 { ISD::ABS, MVT::v16i16, 3 }, in getTypeBasedIntrinsicInstrCost()
2492 { ISD::BITREVERSE, MVT::v16i16, 12 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2496 { ISD::BSWAP, MVT::v16i16, 4 }, in getTypeBasedIntrinsicInstrCost()
2499 { ISD::CTLZ, MVT::v16i16, 30 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2503 { ISD::CTPOP, MVT::v16i16, 20 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2507 { ISD::CTTZ, MVT::v16i16, 26 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2509 { ISD::SADDSAT, MVT::v16i16, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2512 { ISD::SMAX, MVT::v16i16, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2515 { ISD::SMIN, MVT::v16i16, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2517 { ISD::SSUBSAT, MVT::v16i16, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2519 { ISD::UADDSAT, MVT::v16i16, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2523 { ISD::UMAX, MVT::v16i16, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2526 { ISD::UMIN, MVT::v16i16, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2528 { ISD::USUBSAT, MVT::v16i16, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2932 { ISD::ROTL, MVT::v16i16, 4 }, in getIntrinsicInstrCost()
2940 { ISD::ROTR, MVT::v16i16, 6 }, in getIntrinsicInstrCost()
3372 { ISD::ADD, MVT::v16i16, 5 }, in getArithmeticReductionCost()
3444 { ISD::AND, MVT::v16i16, 2 }, // vpmovmskb + cmp in getArithmeticReductionCost()
3446 { ISD::OR, MVT::v16i16, 2 }, // vpmovmskb + cmp in getArithmeticReductionCost()
3453 { ISD::AND, MVT::v16i16, 4 }, // vextractf128 + vpand + vpmovmskb + cmp in getArithmeticReductionCost()
3457 { ISD::OR, MVT::v16i16, 4 }, // vextractf128 + vpor + vpmovmskb + cmp in getArithmeticReductionCost()
3616 {ISD::SMIN, MVT::v16i16, 3}, in getMinMaxCost()
3617 {ISD::UMIN, MVT::v16i16, 3}, in getMinMaxCost()
3625 {ISD::SMIN, MVT::v16i16, 1}, in getMinMaxCost()
3626 {ISD::UMIN, MVT::v16i16, 1}, in getMinMaxCost()
3749 {ISD::SMIN, MVT::v16i16, 6}, in getMinMaxReductionCost()
3750 {ISD::UMIN, MVT::v16i16, 6}, // FIXME: umin is cheaper than umax in getMinMaxReductionCost()