Lines Matching refs:v32i8
339 { ISD::SHL, MVT::v32i8, 2 }, // psllw + pand. in getArithmeticInstrCost()
340 { ISD::SRL, MVT::v32i8, 2 }, // psrlw + pand. in getArithmeticInstrCost()
341 { ISD::SRA, MVT::v32i8, 4 }, // psrlw, pand, pxor, psubb. in getArithmeticInstrCost()
363 { ISD::SHL, MVT::v32i8, 4+2 }, // 2*(psllw + pand) + split. in getArithmeticInstrCost()
364 { ISD::SRL, MVT::v32i8, 4+2 }, // 2*(psrlw + pand) + split. in getArithmeticInstrCost()
365 { ISD::SRA, MVT::v32i8, 8+2 }, // 2*(psrlw, pand, pxor, psubb) + split. in getArithmeticInstrCost()
428 { ISD::SDIV, MVT::v32i8, 14 }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
429 { ISD::SREM, MVT::v32i8, 16 }, // 2*ext+2*pmulhw+mul+sub sequence in getArithmeticInstrCost()
430 { ISD::UDIV, MVT::v32i8, 14 }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
431 { ISD::UREM, MVT::v32i8, 16 }, // 2*ext+2*pmulhw+mul+sub sequence in getArithmeticInstrCost()
450 { ISD::SDIV, MVT::v32i8, 28+2 }, // 4*ext+4*pmulhw sequence + split. in getArithmeticInstrCost()
451 { ISD::SREM, MVT::v32i8, 32+2 }, // 4*ext+4*pmulhw+mul+sub sequence + split. in getArithmeticInstrCost()
454 { ISD::UDIV, MVT::v32i8, 28+2 }, // 4*ext+4*pmulhw sequence + split. in getArithmeticInstrCost()
455 { ISD::UREM, MVT::v32i8, 32+2 }, // 4*ext+4*pmulhw+mul+sub sequence + split. in getArithmeticInstrCost()
568 { ISD::MUL, MVT::v32i8, 4 }, // extend/pmullw/trunc sequence. in getArithmeticInstrCost()
590 { ISD::MUL, MVT::v32i8, 13 }, // extend/pmullw/trunc sequence. in getArithmeticInstrCost()
668 { ISD::SHL, MVT::v32i8, 2+2 }, in getArithmeticInstrCost()
669 { ISD::SRL, MVT::v32i8, 4+2 }, in getArithmeticInstrCost()
670 { ISD::SRA, MVT::v32i8, 4+2 }, in getArithmeticInstrCost()
736 { ISD::SHL, MVT::v32i8, 11 }, // vpblendvb sequence. in getArithmeticInstrCost()
741 { ISD::SRL, MVT::v32i8, 11 }, // vpblendvb sequence. in getArithmeticInstrCost()
746 { ISD::SRA, MVT::v32i8, 24 }, // vpblendvb sequence. in getArithmeticInstrCost()
753 { ISD::SUB, MVT::v32i8, 1 }, // psubb in getArithmeticInstrCost()
754 { ISD::ADD, MVT::v32i8, 1 }, // paddb in getArithmeticInstrCost()
762 { ISD::MUL, MVT::v32i8, 17 }, // extend/pmullw/trunc sequence. in getArithmeticInstrCost()
794 { ISD::SUB, MVT::v32i8, 4 }, in getArithmeticInstrCost()
795 { ISD::ADD, MVT::v32i8, 4 }, in getArithmeticInstrCost()
810 { ISD::MUL, MVT::v32i8, 26 }, // extend/pmullw/trunc sequence. in getArithmeticInstrCost()
852 { ISD::SHL, MVT::v32i8, 2*11+2 }, // pblendvb sequence + split. in getArithmeticInstrCost()
859 { ISD::SRL, MVT::v32i8, 2*12+2 }, // pblendvb sequence + split. in getArithmeticInstrCost()
866 { ISD::SRA, MVT::v32i8, 2*24+2 }, // pblendvb sequence + split. in getArithmeticInstrCost()
1100 {TTI::SK_Reverse, MVT::v32i8, 1}, // vpermb in getShuffleCost()
1103 {TTI::SK_PermuteSingleSrc, MVT::v32i8, 1}, // vpermb in getShuffleCost()
1106 {TTI::SK_PermuteTwoSrc, MVT::v32i8, 2}, // vpermt2b in getShuffleCost()
1206 {TTI::SK_Broadcast, MVT::v32i8, 1}, // vpbroadcastb in getShuffleCost()
1213 {TTI::SK_Reverse, MVT::v32i8, 2}, // vperm2i128 + pshufb in getShuffleCost()
1216 {TTI::SK_Select, MVT::v32i8, 1}, // vpblendvb in getShuffleCost()
1224 {TTI::SK_PermuteSingleSrc, MVT::v32i8, 4}, // vperm2i128 + 2*vpshufb in getShuffleCost()
1233 {TTI::SK_PermuteTwoSrc, MVT::v32i8, 7}, // 2*vperm2i128 + 4*vpshufb in getShuffleCost()
1248 {TTI::SK_PermuteSingleSrc, MVT::v32i8, 4}, // vextractf128 + 2*vpperm in getShuffleCost()
1254 {TTI::SK_PermuteTwoSrc, MVT::v32i8, 9}, // 2*vextractf128 + 6*vpperm in getShuffleCost()
1269 {TTI::SK_Broadcast, MVT::v32i8, 2}, // vpshufb + vinsertf128 in getShuffleCost()
1277 {TTI::SK_Reverse, MVT::v32i8, 4}, // vextractf128 + 2*pshufb in getShuffleCost()
1285 {TTI::SK_Select, MVT::v32i8, 3}, // vpand + vpandn + vpor in getShuffleCost()
1293 {TTI::SK_PermuteSingleSrc, MVT::v32i8, 8}, // vextractf128 + 4*pshufb in getShuffleCost()
1302 {TTI::SK_PermuteTwoSrc, MVT::v32i8, 15}, // 2*vextractf128 + 8*pshufb in getShuffleCost()
1416 { ISD::SIGN_EXTEND, MVT::v32i16, MVT::v32i8, 1 }, in getCastInstrCost()
1417 { ISD::ZERO_EXTEND, MVT::v32i16, MVT::v32i8, 1 }, in getCastInstrCost()
1428 { ISD::SIGN_EXTEND, MVT::v32i8, MVT::v32i1, 1 }, in getCastInstrCost()
1441 { ISD::ZERO_EXTEND, MVT::v32i8, MVT::v32i1, 2 }, in getCastInstrCost()
1445 { ISD::TRUNCATE, MVT::v32i8, MVT::v32i16, 2 }, in getCastInstrCost()
1455 { ISD::TRUNCATE, MVT::v32i1, MVT::v32i8, 2 }, // widen to zmm in getCastInstrCost()
1506 { ISD::TRUNCATE, MVT::v32i8, MVT::v32i16, 8 }, in getCastInstrCost()
1557 { ISD::SIGN_EXTEND, MVT::v32i16, MVT::v32i8, 3 }, // FIXME: May not be right in getCastInstrCost()
1558 { ISD::ZERO_EXTEND, MVT::v32i16, MVT::v32i8, 3 }, // FIXME: May not be right in getCastInstrCost()
1603 { ISD::SIGN_EXTEND, MVT::v32i8, MVT::v32i1, 1 }, in getCastInstrCost()
1614 { ISD::ZERO_EXTEND, MVT::v32i8, MVT::v32i1, 2 }, in getCastInstrCost()
1625 { ISD::TRUNCATE, MVT::v32i1, MVT::v32i8, 2 }, // vpsllw+vptestmb in getCastInstrCost()
2179 { ISD::SETCC, MVT::v32i8, 1 }, in getCmpSelInstrCost()
2184 { ISD::SELECT, MVT::v32i8, 1 }, // pblendvb in getCmpSelInstrCost()
2194 { ISD::SETCC, MVT::v32i8, 4 }, in getCmpSelInstrCost()
2201 { ISD::SELECT, MVT::v32i8, 3 }, // vandps + vandnps + vorps in getCmpSelInstrCost()
2302 { ISD::CTLZ, MVT::v32i8, 10 }, in getTypeBasedIntrinsicInstrCost()
2420 { ISD::BITREVERSE, MVT::v32i8, 4 }, in getTypeBasedIntrinsicInstrCost()
2434 { ISD::ABS, MVT::v32i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2438 { ISD::BITREVERSE, MVT::v32i8, 5 }, in getTypeBasedIntrinsicInstrCost()
2445 { ISD::CTLZ, MVT::v32i8, 9 }, in getTypeBasedIntrinsicInstrCost()
2449 { ISD::CTPOP, MVT::v32i8, 6 }, in getTypeBasedIntrinsicInstrCost()
2453 { ISD::CTTZ, MVT::v32i8, 9 }, in getTypeBasedIntrinsicInstrCost()
2455 { ISD::SADDSAT, MVT::v32i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2458 { ISD::SMAX, MVT::v32i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2461 { ISD::SMIN, MVT::v32i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2463 { ISD::SSUBSAT, MVT::v32i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2465 { ISD::UADDSAT, MVT::v32i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2469 { ISD::UMAX, MVT::v32i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2472 { ISD::UMIN, MVT::v32i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2474 { ISD::USUBSAT, MVT::v32i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2489 { ISD::ABS, MVT::v32i8, 3 }, in getTypeBasedIntrinsicInstrCost()
2493 { ISD::BITREVERSE, MVT::v32i8, 12 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2500 { ISD::CTLZ, MVT::v32i8, 20 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2504 { ISD::CTPOP, MVT::v32i8, 14 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2508 { ISD::CTTZ, MVT::v32i8, 20 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2510 { ISD::SADDSAT, MVT::v32i8, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2513 { ISD::SMAX, MVT::v32i8, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2516 { ISD::SMIN, MVT::v32i8, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2518 { ISD::SSUBSAT, MVT::v32i8, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2520 { ISD::UADDSAT, MVT::v32i8, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2524 { ISD::UMAX, MVT::v32i8, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2527 { ISD::UMIN, MVT::v32i8, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2529 { ISD::USUBSAT, MVT::v32i8, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2933 { ISD::ROTL, MVT::v32i8, 4 }, in getIntrinsicInstrCost()
2941 { ISD::ROTR, MVT::v32i8, 6 }, in getIntrinsicInstrCost()
3373 { ISD::ADD, MVT::v32i8, 4 }, in getArithmeticReductionCost()
3445 { ISD::AND, MVT::v32i8, 2 }, // vpmovmskb + cmp in getArithmeticReductionCost()
3447 { ISD::OR, MVT::v32i8, 2 }, // vpmovmskb + cmp in getArithmeticReductionCost()
3454 { ISD::AND, MVT::v32i8, 4 }, // vextractf128 + vpand + vpmovmskb + cmp in getArithmeticReductionCost()
3458 { ISD::OR, MVT::v32i8, 4 }, // vextractf128 + vpor + vpmovmskb + cmp in getArithmeticReductionCost()
3618 {ISD::SMIN, MVT::v32i8, 3}, in getMinMaxCost()
3619 {ISD::UMIN, MVT::v32i8, 3}, in getMinMaxCost()
3627 {ISD::SMIN, MVT::v32i8, 1}, in getMinMaxCost()
3628 {ISD::UMIN, MVT::v32i8, 1}, in getMinMaxCost()
3751 {ISD::SMIN, MVT::v32i8, 8}, in getMinMaxReductionCost()
3752 {ISD::UMIN, MVT::v32i8, 8}, in getMinMaxReductionCost()
4565 { 3, MVT::v32i8, 13}, //(load 96i8 and) deinterleave into 3 x 32i8 in getInterleavedMemoryOpCostAVX2()
4572 { 4, MVT::v32i8, 80 }, //(load 128i8 and) deinterleave into 4 x 32i8 in getInterleavedMemoryOpCostAVX2()
4585 { 3, MVT::v32i8, 13 }, //interleave 3 x 32i8 into 96i8 (and store) in getInterleavedMemoryOpCostAVX2()
4591 { 4, MVT::v32i8, 12 } //interleave 4 x 32i8 into 128i8 (and store) in getInterleavedMemoryOpCostAVX2()
4654 {3, MVT::v32i8, 14}, //(load 96i8 and) deinterleave into 3 x 32i8 in getInterleavedMemoryOpCostAVX512()
4708 {3, MVT::v32i8, 14}, // interleave 3 x 32i8 into 96i8 (and store) in getInterleavedMemoryOpCostAVX512()
4713 {4, MVT::v32i8, 14}, // interleave 4 x 32i8 into 128i8 (and store) in getInterleavedMemoryOpCostAVX512()