Lines Matching full:copy
5 # Also check that we constrain the register class of the COPY to GPR32.
20 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
21 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
22 ; CHECK: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]
23 ; CHECK: $w0 = COPY [[ADDWrr]]
24 %0(s32) = COPY $w0
25 %1(s32) = COPY $w1
27 $w0 = COPY %2(s32)
46 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
47 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
48 ; CHECK: [[ADDXrr:%[0-9]+]]:gpr64 = ADDXrr [[COPY]], [[COPY1]]
49 ; CHECK: $x0 = COPY [[ADDXrr]]
50 %0(s64) = COPY $x0
51 %1(s64) = COPY $x1
53 $x0 = COPY %2(s64)
71 ; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0
72 ; CHECK: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[COPY]], 1, 0
73 ; CHECK: $w0 = COPY [[ADDWri]]
74 %0(s32) = COPY $w0
77 $w0 = COPY %2(s32)
95 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
96 ; CHECK: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri [[COPY]], 1, 0
97 ; CHECK: $x0 = COPY [[ADDXri]]
98 %0(s64) = COPY $x0
101 $x0 = COPY %2(s64)
119 ; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w1
120 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
121 ; CHECK: $w2 = COPY [[SUBSWri]]
122 %0(s32) = COPY $w1
125 $w2 = COPY %2(s32)
143 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
144 ; CHECK: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[COPY]], 1, 0, implicit-def $nzcv
145 ; CHECK: $x0 = COPY [[SUBSXri]]
146 %0(s64) = COPY $x0
149 $x0 = COPY %2(s64)
167 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
169 ; CHECK: [[ADDXrr:%[0-9]+]]:gpr64 = ADDXrr [[COPY]], [[MOVi64imm]]
170 ; CHECK: $x0 = COPY [[ADDXrr]]
171 %0(s64) = COPY $x0
174 $x0 = COPY %2(s64)
192 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
194 ; CHECK: [[ADDXrr:%[0-9]+]]:gpr64 = ADDXrr [[COPY]], [[MOVi64imm]]
195 ; CHECK: $x0 = COPY [[ADDXrr]]
196 %0(s64) = COPY $x0
199 $x0 = COPY %2(s64)
218 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
219 ; CHECK: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri [[COPY]], 0, 0
220 ; CHECK: $x0 = COPY [[ADDXri]]
221 %0(s64) = COPY $x0
224 $x0 = COPY %2(s64)
243 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
244 ; CHECK: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri [[COPY]], 0, 0
245 ; CHECK: $x0 = COPY [[ADDXri]]
246 %0(s64) = COPY $x0
249 $x0 = COPY %2(s64)
266 ; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0
269 ; CHECK: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[COPY]], 1, 0
270 ; CHECK: $w0 = COPY [[ADDWri]]
275 %0(s32) = COPY $w0
281 $w0 = COPY %2(s32)
300 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
301 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
302 ; CHECK: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY]], [[COPY1]], implicit-def $nzcv
303 ; CHECK: $w0 = COPY [[SUBSWrr]]
304 %0(s32) = COPY $w0
305 %1(s32) = COPY $w1
307 $w0 = COPY %2(s32)
326 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
327 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
328 ; CHECK: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY]], [[COPY1]], implicit-def $nzcv
329 ; CHECK: $x0 = COPY [[SUBSXrr]]
330 %0(s64) = COPY $x0
331 %1(s64) = COPY $x1
333 $x0 = COPY %2(s64)
352 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
353 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
354 ; CHECK: [[ORRWrr:%[0-9]+]]:gpr32 = ORRWrr [[COPY]], [[COPY1]]
355 ; CHECK: $w0 = COPY [[ORRWrr]]
356 %0(s32) = COPY $w0
357 %1(s32) = COPY $w1
359 $w0 = COPY %2(s32)
378 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
379 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
380 ; CHECK: [[ORRXrr:%[0-9]+]]:gpr64 = ORRXrr [[COPY]], [[COPY1]]
381 ; CHECK: $x0 = COPY [[ORRXrr]]
382 %0(s64) = COPY $x0
383 %1(s64) = COPY $x1
385 $x0 = COPY %2(s64)
406 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
407 ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
408 ; CHECK: [[ORRv8i8_:%[0-9]+]]:fpr64 = ORRv8i8 [[COPY]], [[COPY1]]
409 ; CHECK: $d0 = COPY [[ORRv8i8_]]
410 %0(<2 x s32>) = COPY $d0
411 %1(<2 x s32>) = COPY $d1
413 $d0 = COPY %2(<2 x s32>)
432 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
433 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
434 ; CHECK: [[ANDWrr:%[0-9]+]]:gpr32 = ANDWrr [[COPY]], [[COPY1]]
435 ; CHECK: $w0 = COPY [[ANDWrr]]
436 %0(s32) = COPY $w0
437 %1(s32) = COPY $w1
439 $w0 = COPY %2(s32)
458 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
459 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
460 ; CHECK: [[ANDXrr:%[0-9]+]]:gpr64 = ANDXrr [[COPY]], [[COPY1]]
461 ; CHECK: $x0 = COPY [[ANDXrr]]
462 %0(s64) = COPY $x0
463 %1(s64) = COPY $x1
465 $x0 = COPY %2(s64)
484 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
485 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
486 ; CHECK: [[LSLVWr:%[0-9]+]]:gpr32 = LSLVWr [[COPY]], [[COPY1]]
487 ; CHECK: $w0 = COPY [[LSLVWr]]
488 %0(s32) = COPY $w0
489 %1(s32) = COPY $w1
491 $w0 = COPY %2(s32)
510 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
511 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
512 ; CHECK: [[LSLVXr:%[0-9]+]]:gpr64 = LSLVXr [[COPY]], [[COPY1]]
513 ; CHECK: $x0 = COPY [[LSLVXr]]
514 %0(s64) = COPY $x0
515 %1(s64) = COPY $x1
517 $x0 = COPY %2(s64)
536 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
537 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
538 ; CHECK: [[LSRVWr:%[0-9]+]]:gpr32 = LSRVWr [[COPY]], [[COPY1]]
539 ; CHECK: $w0 = COPY [[LSRVWr]]
540 %0(s32) = COPY $w0
541 %1(s32) = COPY $w1
543 $w0 = COPY %2(s32)
562 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
563 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
564 ; CHECK: [[LSRVXr:%[0-9]+]]:gpr64 = LSRVXr [[COPY]], [[COPY1]]
565 ; CHECK: $x0 = COPY [[LSRVXr]]
566 %0(s64) = COPY $x0
567 %1(s64) = COPY $x1
569 $x0 = COPY %2(s64)
588 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
589 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
590 ; CHECK: [[ASRVWr:%[0-9]+]]:gpr32 = ASRVWr [[COPY]], [[COPY1]]
591 ; CHECK: $w0 = COPY [[ASRVWr]]
592 %0(s32) = COPY $w0
593 %1(s32) = COPY $w1
595 $w0 = COPY %2(s32)
614 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
615 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
616 ; CHECK: [[ASRVXr:%[0-9]+]]:gpr64 = ASRVXr [[COPY]], [[COPY1]]
617 ; CHECK: $x0 = COPY [[ASRVXr]]
618 %0(s64) = COPY $x0
619 %1(s64) = COPY $x1
621 $x0 = COPY %2(s64)
641 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
642 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
643 ; CHECK: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY]], [[COPY1]], $wzr
644 ; CHECK: $w0 = COPY [[MADDWrrr]]
645 %0(s32) = COPY $w0
646 %1(s32) = COPY $w1
648 $w0 = COPY %2(s32)
667 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
668 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
669 ; CHECK: [[MADDXrrr:%[0-9]+]]:gpr64 = MADDXrrr [[COPY]], [[COPY1]], $xzr
670 ; CHECK: $x0 = COPY [[MADDXrrr]]
671 %0(s64) = COPY $x0
672 %1(s64) = COPY $x1
674 $x0 = COPY %2(s64)
689 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
690 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
691 ; CHECK: [[SMULHrr:%[0-9]+]]:gpr64 = SMULHrr [[COPY]], [[COPY1]]
692 ; CHECK: [[UMULHrr:%[0-9]+]]:gpr64 = UMULHrr [[COPY]], [[COPY1]]
693 ; CHECK: $x0 = COPY [[SMULHrr]]
694 ; CHECK: $x0 = COPY [[UMULHrr]]
695 %0:gpr(s64) = COPY $x0
696 %1:gpr(s64) = COPY $x1
699 $x0 = COPY %2(s64)
700 $x0 = COPY %3(s64)
719 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
720 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
721 ; CHECK: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[COPY]], [[COPY1]]
722 ; CHECK: $w0 = COPY [[SDIVWr]]
723 %0(s32) = COPY $w0
724 %1(s32) = COPY $w1
726 $w0 = COPY %2(s32)
745 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
746 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
747 ; CHECK: [[SDIVXr:%[0-9]+]]:gpr64 = SDIVXr [[COPY]], [[COPY1]]
748 ; CHECK: $x0 = COPY [[SDIVXr]]
749 %0(s64) = COPY $x0
750 %1(s64) = COPY $x1
752 $x0 = COPY %2(s64)
771 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
772 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
773 ; CHECK: [[UDIVWr:%[0-9]+]]:gpr32 = UDIVWr [[COPY]], [[COPY1]]
774 ; CHECK: $w0 = COPY [[UDIVWr]]
775 %0(s32) = COPY $w0
776 %1(s32) = COPY $w1
778 $w0 = COPY %2(s32)
797 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
798 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
799 ; CHECK: [[UDIVXr:%[0-9]+]]:gpr64 = UDIVXr [[COPY]], [[COPY1]]
800 ; CHECK: $x0 = COPY [[UDIVXr]]
801 %0(s64) = COPY $x0
802 %1(s64) = COPY $x1
804 $x0 = COPY %2(s64)
823 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
824 ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1
825 ; CHECK: [[FADDSrr:%[0-9]+]]:fpr32 = FADDSrr [[COPY]], [[COPY1]]
826 ; CHECK: $s0 = COPY [[FADDSrr]]
827 %0(s32) = COPY $s0
828 %1(s32) = COPY $s1
830 $s0 = COPY %2(s32)
848 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
849 ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
850 ; CHECK: [[FADDDrr:%[0-9]+]]:fpr64 = FADDDrr [[COPY]], [[COPY1]]
851 ; CHECK: $d0 = COPY [[FADDDrr]]
852 %0(s64) = COPY $d0
853 %1(s64) = COPY $d1
855 $d0 = COPY %2(s64)
873 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
874 ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1
875 ; CHECK: [[FSUBSrr:%[0-9]+]]:fpr32 = FSUBSrr [[COPY]], [[COPY1]]
876 ; CHECK: $s0 = COPY [[FSUBSrr]]
877 %0(s32) = COPY $s0
878 %1(s32) = COPY $s1
880 $s0 = COPY %2(s32)
898 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
899 ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
900 ; CHECK: [[FSUBDrr:%[0-9]+]]:fpr64 = FSUBDrr [[COPY]], [[COPY1]]
901 ; CHECK: $d0 = COPY [[FSUBDrr]]
902 %0(s64) = COPY $d0
903 %1(s64) = COPY $d1
905 $d0 = COPY %2(s64)
923 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
924 ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1
925 ; CHECK: [[FMULSrr:%[0-9]+]]:fpr32 = FMULSrr [[COPY]], [[COPY1]]
926 ; CHECK: $s0 = COPY [[FMULSrr]]
927 %0(s32) = COPY $s0
928 %1(s32) = COPY $s1
930 $s0 = COPY %2(s32)
948 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
949 ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
950 ; CHECK: [[FMULDrr:%[0-9]+]]:fpr64 = FMULDrr [[COPY]], [[COPY1]]
951 ; CHECK: $d0 = COPY [[FMULDrr]]
952 %0(s64) = COPY $d0
953 %1(s64) = COPY $d1
955 $d0 = COPY %2(s64)
973 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
974 ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1
975 ; CHECK: [[FDIVSrr:%[0-9]+]]:fpr32 = FDIVSrr [[COPY]], [[COPY1]]
976 ; CHECK: $s0 = COPY [[FDIVSrr]]
977 %0(s32) = COPY $s0
978 %1(s32) = COPY $s1
980 $s0 = COPY %2(s32)
998 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
999 ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
1000 ; CHECK: [[FDIVDrr:%[0-9]+]]:fpr64 = FDIVDrr [[COPY]], [[COPY1]]
1001 ; CHECK: $d0 = COPY [[FDIVDrr]]
1002 %0(s64) = COPY $d0
1003 %1(s64) = COPY $d1
1005 $d0 = COPY %2(s64)
1024 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
1025 ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
1026 ; CHECK: [[ADDv8i16_:%[0-9]+]]:fpr128 = ADDv8i16 [[COPY]], [[COPY1]]
1027 ; CHECK: $q0 = COPY [[ADDv8i16_]]
1029 %0:fpr(<8 x s16>) = COPY $q0
1030 %1:fpr(<8 x s16>) = COPY $q1
1032 $q0 = COPY %2(<8 x s16>)
1053 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
1054 ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
1055 ; CHECK: [[ADDv16i8_:%[0-9]+]]:fpr128 = ADDv16i8 [[COPY]], [[COPY1]]
1056 ; CHECK: $q0 = COPY [[ADDv16i8_]]
1058 %0:fpr(<16 x s8>) = COPY $q0
1059 %1:fpr(<16 x s8>) = COPY $q1
1061 $q0 = COPY %2(<16 x s8>)
1076 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
1077 ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
1078 ; CHECK: [[ADDv4i16_:%[0-9]+]]:fpr64 = ADDv4i16 [[COPY]], [[COPY1]]
1079 ; CHECK: $d0 = COPY [[ADDv4i16_]]
1081 %0:fpr(<4 x s16>) = COPY $d0
1082 %1:fpr(<4 x s16>) = COPY $d1
1084 $d0 = COPY %2(<4 x s16>)
1098 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
1099 ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
1100 ; CHECK: [[ORRv8i8_:%[0-9]+]]:fpr64 = ORRv8i8 [[COPY]], [[COPY1]]
1101 ; CHECK: $d0 = COPY [[ORRv8i8_]]
1103 %0:fpr(<4 x s16>) = COPY $d0
1104 %1:fpr(<4 x s16>) = COPY $d1
1106 $d0 = COPY %2(<4 x s16>)
1120 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
1121 ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
1122 ; CHECK: [[EORv8i8_:%[0-9]+]]:fpr64 = EORv8i8 [[COPY]], [[COPY1]]
1123 ; CHECK: $d0 = COPY [[EORv8i8_]]
1125 %0:fpr(<4 x s16>) = COPY $d0
1126 %1:fpr(<4 x s16>) = COPY $d1
1128 $d0 = COPY %2(<4 x s16>)
1142 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
1143 ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
1144 ; CHECK: [[MULv4i16_:%[0-9]+]]:fpr64 = MULv4i16 [[COPY]], [[COPY1]]
1145 ; CHECK: $d0 = COPY [[MULv4i16_]]
1147 %0:fpr(<4 x s16>) = COPY $d0
1148 %1:fpr(<4 x s16>) = COPY $d1
1150 $d0 = COPY %2(<4 x s16>)