Lines Matching refs:sqrdmulh
11 declare <4 x i32> @llvm.aarch64.neon.sqrdmulh.v4i32(<4 x i32>, <4 x i32>)
12 declare <4 x i32> @llvm.aarch64.neon.sqrdmulh.lane.v4i32.v2i32(<4 x i32>, <2 x i32>, i32)
13 declare <4 x i32> @llvm.aarch64.neon.sqrdmulh.laneq.v4i32.v4i32(<4 x i32>, <4 x i32>, i32)
15 declare <2 x i32> @llvm.aarch64.neon.sqrdmulh.v2i32(<2 x i32>, <2 x i32>)
16 declare <2 x i32> @llvm.aarch64.neon.sqrdmulh.lane.v2i32.v2i32(<2 x i32>, <2 x i32>, i32)
17 declare <2 x i32> @llvm.aarch64.neon.sqrdmulh.laneq.v2i32.v4i32(<2 x i32>, <4 x i32>, i32)
19 declare <8 x i16> @llvm.aarch64.neon.sqrdmulh.v8i16(<8 x i16>, <8 x i16>)
20 declare <8 x i16> @llvm.aarch64.neon.sqrdmulh.lane.v8i16.v4i16(<8 x i16>, <4 x i16>, i32)
21 declare <8 x i16> @llvm.aarch64.neon.sqrdmulh.laneq.v8i16.v8i16(<8 x i16>, <8 x i16>, i32)
23 declare <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16>, <4 x i16>)
24 declare <4 x i16> @llvm.aarch64.neon.sqrdmulh.lane.v4i16.v4i16(<4 x i16>, <4 x i16>, i32)
25 declare <4 x i16> @llvm.aarch64.neon.sqrdmulh.laneq.v4i16.v8i16(<4 x i16>, <8 x i16>, i32)
1698 ; CHECK-NEXT: sqrdmulh v0.4h, v0.4h, v1.h[3]
1702 …%vqrdmulh2.i = tail call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> %a, <4 x i16> %shuf…
1710 ; CHECK-NEXT: sqrdmulh v0.4h, v0.4h, v1.h[3]
1713 …%vqrdmulh2.i = tail call <4 x i16> @llvm.aarch64.neon.sqrdmulh.lane.v4i16.v4i16(<4 x i16> %a, <4 x…
1720 ; CHECK-NEXT: sqrdmulh v0.4h, v0.4h, v1.h[3]
1723 …%vqrdmulh2.i = tail call <4 x i16> @llvm.aarch64.neon.sqrdmulh.laneq.v4i16.v8i16(<4 x i16> %a, <8 …
1730 ; CHECK-NEXT: sqrdmulh v0.4h, v0.4h, v1.h[7]
1733 …%vqrdmulh2.i = tail call <4 x i16> @llvm.aarch64.neon.sqrdmulh.laneq.v4i16.v8i16(<4 x i16> %a, <8 …
1741 ; CHECK-NEXT: sqrdmulh v0.8h, v0.8h, v1.h[3]
1745 …%vqrdmulh2.i = tail call <8 x i16> @llvm.aarch64.neon.sqrdmulh.v8i16(<8 x i16> %a, <8 x i16> %shuf…
1753 ; CHECK-NEXT: sqrdmulh v0.8h, v0.8h, v1.h[3]
1756 …%vqrdmulh2.i = tail call <8 x i16> @llvm.aarch64.neon.sqrdmulh.lane.v8i16.v4i16(<8 x i16> %a, <4 x…
1763 ; CHECK-NEXT: sqrdmulh v0.8h, v0.8h, v1.h[3]
1766 …%vqrdmulh2.i = tail call <8 x i16> @llvm.aarch64.neon.sqrdmulh.laneq.v8i16.v8i16(<8 x i16> %a, <8 …
1773 ; CHECK-NEXT: sqrdmulh v0.8h, v0.8h, v1.h[7]
1776 …%vqrdmulh2.i = tail call <8 x i16> @llvm.aarch64.neon.sqrdmulh.laneq.v8i16.v8i16(<8 x i16> %a, <8 …
1784 ; CHECK-NEXT: sqrdmulh v0.2s, v0.2s, v1.s[1]
1788 …%vqrdmulh2.i = tail call <2 x i32> @llvm.aarch64.neon.sqrdmulh.v2i32(<2 x i32> %a, <2 x i32> %shuf…
1796 ; CHECK-NEXT: sqrdmulh v0.2s, v0.2s, v1.s[1]
1799 …%vqrdmulh2.i = tail call <2 x i32> @llvm.aarch64.neon.sqrdmulh.lane.v2i32.v2i32(<2 x i32> %a, <2 x…
1806 ; CHECK-NEXT: sqrdmulh v0.2s, v0.2s, v1.s[1]
1809 …%vqrdmulh2.i = tail call <2 x i32> @llvm.aarch64.neon.sqrdmulh.laneq.v2i32.v4i32(<2 x i32> %a, <4 …
1816 ; CHECK-NEXT: sqrdmulh v0.2s, v0.2s, v1.s[3]
1819 …%vqrdmulh2.i = tail call <2 x i32> @llvm.aarch64.neon.sqrdmulh.laneq.v2i32.v4i32(<2 x i32> %a, <4 …
1827 ; CHECK-NEXT: sqrdmulh v0.4s, v0.4s, v1.s[1]
1831 …%vqrdmulh2.i = tail call <4 x i32> @llvm.aarch64.neon.sqrdmulh.v4i32(<4 x i32> %a, <4 x i32> %shuf…
1839 ; CHECK-NEXT: sqrdmulh v0.4s, v0.4s, v1.s[1]
1842 …%vqrdmulh2.i = tail call <4 x i32> @llvm.aarch64.neon.sqrdmulh.lane.v4i32.v2i32(<4 x i32> %a, <2 x…
1849 ; CHECK-NEXT: sqrdmulh v0.4s, v0.4s, v1.s[1]
1852 …%vqrdmulh2.i = tail call <4 x i32> @llvm.aarch64.neon.sqrdmulh.laneq.v4i32.v4i32(<4 x i32> %a, <4 …
1859 ; CHECK-NEXT: sqrdmulh v0.4s, v0.4s, v1.s[3]
1862 …%vqrdmulh2.i = tail call <4 x i32> @llvm.aarch64.neon.sqrdmulh.laneq.v4i32.v4i32(<4 x i32> %a, <4 …
3481 ; CHECK-NEXT: sqrdmulh v0.4h, v0.4h, v1.h[0]
3485 …%vqrdmulh2.i = tail call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> %a, <4 x i16> %shuf…
3493 ; CHECK-NEXT: sqrdmulh v0.8h, v0.8h, v1.h[0]
3497 …%vqrdmulh2.i = tail call <8 x i16> @llvm.aarch64.neon.sqrdmulh.v8i16(<8 x i16> %a, <8 x i16> %shuf…
3505 ; CHECK-NEXT: sqrdmulh v0.2s, v0.2s, v1.s[0]
3509 …%vqrdmulh2.i = tail call <2 x i32> @llvm.aarch64.neon.sqrdmulh.v2i32(<2 x i32> %a, <2 x i32> %shuf…
3517 ; CHECK-NEXT: sqrdmulh v0.4s, v0.4s, v1.s[0]
3521 …%vqrdmulh2.i = tail call <4 x i32> @llvm.aarch64.neon.sqrdmulh.v4i32(<4 x i32> %a, <4 x i32> %shuf…