Lines Matching refs:var8
11 @var8 = global i8 0
21 ; OUTLINE_ATOMICS-NEXT: adrp x1, var8
22 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var8
26 %old = atomicrmw add i8* @var8, i8 %offset seq_cst
28 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
29 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
134 ; OUTLINE_ATOMICS-NEXT: adrp x1, var8
135 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var8
139 %old = atomicrmw sub i8* @var8, i8 %offset monotonic
141 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
142 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
250 ; OUTLINE_ATOMICS-NEXT: adrp x1, var8
251 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var8
255 %old = atomicrmw and i8* @var8, i8 %offset release
257 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
258 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
365 ; OUTLINE_ATOMICS-NEXT: adrp x1, var8
366 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var8
370 %old = atomicrmw or i8* @var8, i8 %offset seq_cst
372 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
373 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
477 ; OUTLINE_ATOMICS-NEXT: adrp x1, var8
478 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var8
482 %old = atomicrmw xor i8* @var8, i8 %offset acquire
484 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
485 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
589 ; OUTLINE_ATOMICS-NEXT: adrp x1, var8
590 ; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var8
594 %old = atomicrmw xchg i8* @var8, i8 %offset monotonic
596 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
597 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
696 ; OUTLINE_ATOMICS-NEXT: adrp x9, var8
697 ; OUTLINE_ATOMICS-NEXT: add x9, x9, :lo12:var8
709 %old = atomicrmw min i8* @var8, i8 %offset acquire
711 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
712 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
851 ; OUTLINE_ATOMICS-NEXT: adrp x9, var8
852 ; OUTLINE_ATOMICS-NEXT: add x9, x9, :lo12:var8
864 %old = atomicrmw max i8* @var8, i8 %offset seq_cst
866 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
867 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1007 ; OUTLINE_ATOMICS-NEXT: adrp x9, var8
1008 ; OUTLINE_ATOMICS-NEXT: add x9, x9, :lo12:var8
1019 %old = atomicrmw umin i8* @var8, i8 %offset monotonic
1021 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1022 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1159 ; OUTLINE_ATOMICS-NEXT: adrp x9, var8
1160 ; OUTLINE_ATOMICS-NEXT: add x9, x9, :lo12:var8
1171 %old = atomicrmw umax i8* @var8, i8 %offset acq_rel
1173 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1174 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1312 ; OUTLINE_ATOMICS-NEXT: adrp x2, var8
1313 ; OUTLINE_ATOMICS-NEXT: add x2, x2, :lo12:var8
1317 %pair = cmpxchg i8* @var8, i8 %wanted, i8 %new acquire acquire
1321 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1322 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1445 ; OUTLINE_ATOMICS-NEXT: adrp x8, var8
1446 ; OUTLINE_ATOMICS-NEXT: ldrb w0, [x8, :lo12:var8]
1448 %val = load atomic i8, i8* @var8 monotonic, align 1
1450 ; CHECK: adrp x[[HIADDR:[0-9]+]], var8
1451 ; CHECK: ldrb w0, [x[[HIADDR]], {{#?}}:lo12:var8]
1478 ; OUTLINE_ATOMICS-NEXT: adrp x8, var8
1479 ; OUTLINE_ATOMICS-NEXT: add x8, x8, :lo12:var8
1482 %val = load atomic i8, i8* @var8 acquire, align 1
1484 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8
1486 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8
1497 ; OUTLINE_ATOMICS-NEXT: adrp x8, var8
1498 ; OUTLINE_ATOMICS-NEXT: add x8, x8, :lo12:var8
1501 %val = load atomic i8, i8* @var8 seq_cst, align 1
1503 ; CHECK: adrp [[HIADDR:x[0-9]+]], var8
1505 ; CHECK: add x[[ADDR:[0-9]+]], [[HIADDR]], {{#?}}:lo12:var8
1569 ; OUTLINE_ATOMICS-NEXT: adrp x8, var8
1570 ; OUTLINE_ATOMICS-NEXT: strb w0, [x8, :lo12:var8]
1572 store atomic i8 %val, i8* @var8 monotonic, align 1
1573 ; CHECK: adrp x[[HIADDR:[0-9]+]], var8
1574 ; CHECK: strb w0, [x[[HIADDR]], {{#?}}:lo12:var8]
1597 ; OUTLINE_ATOMICS-NEXT: adrp x8, var8
1598 ; OUTLINE_ATOMICS-NEXT: add x8, x8, :lo12:var8
1601 store atomic i8 %val, i8* @var8 release, align 1
1603 ; CHECK: adrp [[HIADDR:x[0-9]+]], var8
1605 ; CHECK: add x[[ADDR:[0-9]+]], [[HIADDR]], {{#?}}:lo12:var8
1616 ; OUTLINE_ATOMICS-NEXT: adrp x8, var8
1617 ; OUTLINE_ATOMICS-NEXT: add x8, x8, :lo12:var8
1620 store atomic i8 %val, i8* @var8 seq_cst, align 1
1622 ; CHECK: adrp [[HIADDR:x[0-9]+]], var8
1624 ; CHECK: add x[[ADDR:[0-9]+]], [[HIADDR]], {{#?}}:lo12:var8